diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-07-24 03:35:11 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-08-16 22:06:57 +0000 |
commit | f710955b93dddb094b9dacf651fe8a0730b21500 (patch) | |
tree | 60b7782b0f887ff37881e6d3b63cca7588dd8f56 /src/vendorcode/amd/agesa | |
parent | 111926a1664769ab7596f2027ac041c56b5bae35 (diff) |
AGESA f15tn: Fix MemContext buffer parser for AmdInitPost()
Like commit c91ab1cfc that targeted AGESA f14.
MemRestore() is still broken after this fix.
Change-Id: I7457de5e0c52819560e2bfd46b9e351b00d3d386
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20900
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/vendorcode/amd/agesa')
-rw-r--r-- | src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmMemRestore.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmMemRestore.c b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmMemRestore.c index ab1ce1a696..346489220e 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmMemRestore.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/Mem/Main/mmMemRestore.c @@ -408,7 +408,9 @@ MemMRestoreDqsTimings ( if (!MemMSetCSRNb (&NBArray[Node], Reg->SpecialCases, PciAddress, *((UINT32 *) OrMask) & Reg->RegisterList[j].AndMask)) { return FALSE; // Restore fails } - OrMask += (Reg->RegisterList[j].Type.RegisterSize == 0) ? 4 : Reg->RegisterList[j].Type.RegisterSize; + if (Reg->RegisterList[j].Type.RegisterSize != 3) + OrMask += (Reg->RegisterList[j].Type.RegisterSize == 0) ? 4 : + Reg->RegisterList[j].Type.RegisterSize; } if (MaxNode < Node) { @@ -431,7 +433,9 @@ MemMRestoreDqsTimings ( if (!MemMSetCSRNb (&NBArray[Node], CReg->SpecialCases, PciAddress, *((UINT32 *) OrMask) & CReg->RegisterList[j].AndMask)) { return FALSE; // Restore fails } - OrMask += (CReg->RegisterList[j].Type.RegisterSize == 0) ? 4 : CReg->RegisterList[j].Type.RegisterSize; + if (CReg->RegisterList[j].Type.RegisterSize != 3) + OrMask += (CReg->RegisterList[j].Type.RegisterSize == 0) ? 4 : + CReg->RegisterList[j].Type.RegisterSize; } } } else if (((State == ST_PRE_ESR) && (Device.CommonDeviceHeader->Type == DEV_TYPE_MSR_PRE_ESR)) || |