diff options
| author | Keith Hui <buurin@gmail.com> | 2011-08-02 22:28:14 -0400 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2011-08-04 08:15:49 +0200 |
| commit | e089a3f68ddbbaaceb25d00322b3e7ccc27a48a8 (patch) | |
| tree | 9fc809fdc68cbec7dd8f7b0ead7ffbc9ad8791fa /src/vendorcode/amd/agesa | |
| parent | 6de1ee4a3021cec992a63dbe20c4c1805e266e95 (diff) | |
northbridge/intel/i440bx: Registered SDRAM modules support and fixes
Adds support for initializing registered SDRAM modules on
Intel 440BX northbridge.
Drops unneeded romcc-inspired programming tricks.
Only set nbxecc flags (see 440BX datasheet, page 3-16) when
a non-ECC module has been detected in a row via SPD; also
drops an unneeded intermediate variable used in setting them.
Boot tested on ASUS P2B-LS with regular and registered ECC
SDRAM under Linux and memtest86+.
Change-Id: Idc99d49567cca55f819d6b0e98952b1c3256498a
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: http://review.coreboot.org/128
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/vendorcode/amd/agesa')
0 files changed, 0 insertions, 0 deletions