diff options
| author | Joe Moore <awokd@danwin1210.me> | 2019-10-21 01:41:24 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-22 12:48:23 +0000 |
| commit | 5bba746f98eb0d8f434a0583cfef9d665cc484e9 (patch) | |
| tree | 7e53edafc66fd6e3fabd77d4cc7e1c76a8956ef2 /src/vendorcode/amd/agesa | |
| parent | 03cfae40a68bdafe919bb923414c4aabd4c581e4 (diff) | |
vc/amd/agesa/f16kb: Remove redundant value assignment
Code sets `Status = TRUE` in section of code that can only be
reached if `Status == TRUE`.
Change-Id: Id9a49476d17a5ca141994b0d5dfc5e5c62a00f0e
Signed-off-by: Joe Moore <awokd@danwin1210.me>
Found-by: Coverity CID 1241801
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36189
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/vendorcode/amd/agesa')
| -rw-r--r-- | src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mttRdDqs2DTraining.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mttRdDqs2DTraining.c b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mttRdDqs2DTraining.c index 08c773080c..9bb94408c5 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mttRdDqs2DTraining.c +++ b/src/vendorcode/amd/agesa/f16kb/Proc/Mem/Tech/mttRdDqs2DTraining.c @@ -260,8 +260,7 @@ MemTAmdRdDqs2DTraining ( // IDS_HDT_CONSOLE (MEM_FLOW, "\n\t\tProgramming Final Vref for channel\n\n"); MemT2DProgramVref (TechPtr, NBPtr->ChannelPtr->MaxVref); - Status = TRUE; - } else { + } else { SetMemError (AGESA_ERROR, NBPtr->MCTPtr); PutEventLog (AGESA_ERROR, MEM_ERROR_2D_DQS_VREF_MARGIN_ERROR, NBPtr->Node, NBPtr->Dct, NBPtr->Channel, 0, &NBPtr->MemPtr->StdHeader); } |