diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2020-08-30 13:51:44 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-09-01 03:06:04 +0000 |
| commit | 8e6d5f2937c169914e46b5ebc973e5df5e4290a7 (patch) | |
| tree | 1550c8877877a7a9b197da65bcff76f878bee560 /src/vendorcode/amd/agesa/f16kb/Proc | |
| parent | b7a68d5b05259a07a84a546e6a7e40948ba705ac (diff) | |
{include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistent
Convert 0X -> 0x
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: Iea3ca67908135d0e85083a05bad2ea176ca34095
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44926
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/vendorcode/amd/agesa/f16kb/Proc')
| -rw-r--r-- | src/vendorcode/amd/agesa/f16kb/Proc/CPU/Table.h | 2 | ||||
| -rw-r--r-- | src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuRegisters.h | 2 | ||||
| -rw-r--r-- | src/vendorcode/amd/agesa/f16kb/Proc/Fch/Fch.h | 12 |
3 files changed, 8 insertions, 8 deletions
diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Table.h b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Table.h index 1f6341abe9..85fb9e4197 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Table.h +++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Table.h @@ -508,7 +508,7 @@ typedef struct { } PACKAGE_TYPE_FEATURES; // Initializer Values for Package Type -#define PACKAGE_TYPE_ALL 0XFFFF ///< Package Type apply all packages +#define PACKAGE_TYPE_ALL 0xFFFF ///< Package Type apply all packages // Initializer Values for Ht Host Pci Config Registers #define HT_HOST_FEAT_COHERENT BIT0 diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuRegisters.h b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuRegisters.h index e59bb88d7e..b1df1841d6 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuRegisters.h +++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/cpuRegisters.h @@ -290,7 +290,7 @@ typedef struct { #define MSR_CPUID_NAME_STRING0 0xC0010030ul // First CPUID namestring register #define MSR_CPUID_NAME_STRING1 0xC0010031ul -#define MSR_CPUID_NAME_STRING2 0XC0010032ul +#define MSR_CPUID_NAME_STRING2 0xC0010032ul #define MSR_CPUID_NAME_STRING3 0xC0010033ul #define MSR_CPUID_NAME_STRING4 0xC0010034ul #define MSR_CPUID_NAME_STRING5 0xC0010035ul // Last CPUID namestring register diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Fch.h b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Fch.h index c370d4c9cf..67a0f4b2da 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Fch.h +++ b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Fch.h @@ -1580,12 +1580,12 @@ FCH_MISC_REGF0 EQU 0F0h #define FCH_SMB_POLL2BYTE BIT7 -#define FCH_EC_ENTER_CONFIG 0X5A -#define FCH_EC_EXIT_CONFIG 0XA5 -#define FCH_EC_REG07 0X07 -#define FCH_EC_REG30 0X30 -#define FCH_EC_REG60 0X60 -#define FCH_EC_REG61 0X61 +#define FCH_EC_ENTER_CONFIG 0x5A +#define FCH_EC_EXIT_CONFIG 0xA5 +#define FCH_EC_REG07 0x07 +#define FCH_EC_REG30 0x30 +#define FCH_EC_REG60 0x60 +#define FCH_EC_REG61 0x61 #define FCH_IMC_ROMSIG 0x55aa55aaul |