diff options
author | Marc Jones <marcj303@gmail.com> | 2017-02-24 16:40:41 -0700 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-07-15 16:09:46 +0000 |
commit | 5a0d29d460fa2d268e8dc1a829c75a8196302aba (patch) | |
tree | 543299729e0cba3be314adf9403290e1e04d6e14 /src/vendorcode/amd/agesa/f15/gcccar.inc | |
parent | acd13985b50adbdb3a5ea8178e59de20986da01b (diff) |
vendorcode/amd/agesa: Clarify CAR disable
Clean up commentary on AMD_DISABLE_STACK to be clear that
it does a wbinvd to preserve coreboot CBMEM and
value of car_migrated.
Change-Id: I0f5e9c807f7990fcd5ca85f77b9d92312e775d3e
Signed-off-by: Marc Jones <marcj303@gmail.com>
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/20578
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/amd/agesa/f15/gcccar.inc')
-rw-r--r-- | src/vendorcode/amd/agesa/f15/gcccar.inc | 46 |
1 files changed, 41 insertions, 5 deletions
diff --git a/src/vendorcode/amd/agesa/f15/gcccar.inc b/src/vendorcode/amd/agesa/f15/gcccar.inc index 9d566f2f1b..4d00df392d 100644 --- a/src/vendorcode/amd/agesa/f15/gcccar.inc +++ b/src/vendorcode/amd/agesa/f15/gcccar.inc @@ -361,6 +361,13 @@ fam10_enable_stack_hook_exit: * Return any family specific controls to their 'standard' * settings for using cache with main memory. * +* Note: Customized for coreboot: +* A wbinvd is used to send cache to memory. The existing stack is preserved +* at its original location and additional information is preserved (e.g. +* coreboot CAR globals, heap structures, etc.). This implementation should +* NOT be used with S3 resume IF the stack/cache area is not reserved and +* over system memory. +* * Inputs: * ESI - [31:24] flags; [15,8]= Node#; [7,0]= core# * Outputs: @@ -420,7 +427,14 @@ fam10_enable_stack_hook_exit: mov %ax, %bx # Save INVD -> WBINVD bit btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion for the invd instruction. _WRMSR - wbinvd # Clear the cache tag RAMs + + #-------------------------------------------------------------------------- + # Send cache to memory. Preserve stack and coreboot CAR globals. + # This shouldn't be used with S3 resume IF the stack/cache area is + # not reserved and over system memory. + #-------------------------------------------------------------------------- + wbinvd + mov %bx, %ax # Restore INVD -> WBINVD bit _WRMSR @@ -939,6 +953,13 @@ fam15_enable_stack_hook_exit: * Return any family specific controls to their 'standard' * settings for using cache with main memory. * +* Note: Customized for coreboot: +* A wbinvd is used to send cache to memory. The existing stack is preserved +* at its original location and additional information is preserved (e.g. +* coreboot CAR globals, heap structures, etc.). This implementation should +* NOT be used with S3 resume IF the stack/cache area is not reserved and +* over system memory. +* * Inputs: * ESI - [31:24] flags; [15,8]= Node#; [7,0]= core# * Outputs: @@ -997,7 +1018,14 @@ fam15_enable_stack_hook_exit: _RDMSR btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion _WRMSR - wbinvd # Clear the cache tag RAMs + + #-------------------------------------------------------------------------- + # Send cache to memory. Preserve stack and coreboot CAR globals. + # This shouldn't be used with S3 resume IF the stack/cache area is + # not reserved and over system memory. + #-------------------------------------------------------------------------- + wbinvd + bts $INVD_WBINVD, %eax # Turn on Conversion of INVD to WBINVD _WRMSR #.endif # end @@ -1582,8 +1610,17 @@ ClearTheStack: # Stack base is in SS, stack pointer is .endm /***************************************************************************** -* AMD_DISABLE_STACK: Destroy the stack inside the cache. This routine -* should only be executed on the BSP +* AMD_DISABLE_STACK: Implementation is modified for coreboot from +* the original AMD intent. A WBINVD is used in the HOOK +* to send dirty cache contents to DRAM backing before +* disabling cache-as-ram. This is not safe for S3 resume. +* +* todo: +* * rework PI/AGESA source to set DRAM to UC to send +* writes directly to memory +* * move DCACHE_BASE or use postcar stage for teardown +* to eliminate car_migrated problem that will occur +* after wbinvd is changed back to invd * * In: * none @@ -1629,4 +1666,3 @@ ClearTheStack: # Stack base is in SS, stack pointer is xor %eax, %eax .endm - |