Update AMD F14 Agesa to support Rev C0 cpus

This change updates the AMD Agesa code to support the Family 14
rev C0 cpus.  It also fixes (again) a ton of warnings, although
not all of them are gone.  The warning fixes affect code in the
Family 12 tree as well, so there are some small changes therein.
This code has been tested on a Persimmon and passes Abuild.
This is the first (and largest) of a number of commits to complete
the upgrade.

Change-Id: Id28d9bf7931f8baa2a602f6bb096a5a465ccd20d
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Reviewed-on: http://review.coreboot.org/131
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>

21 files changed, 228 insertions, 77 deletions

diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/PreserveMailbox.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/PreserveMailbox.c
index a68535774e..2f7a931e4d 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/PreserveMailbox.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/PreserveMailbox.c
@@ -157,7 +157,7 @@ PreserveMailboxes (
     for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) {
       for (Module = 0; Module < GetPlatformNumberOfModules (); Module++) {
         if (GetPciAddress (StdHeader, Socket, Module, &BaseAddress, &IgnoredStatus)) {
-          GetFeatureServicesOfSocket (&PreserveMailboxFamilyServiceTable, Socket, &FamilySpecificServices, StdHeader);
+          GetFeatureServicesOfSocket (&PreserveMailboxFamilyServiceTable, Socket, (const VOID **)&FamilySpecificServices, StdHeader);
           ASSERT (FamilySpecificServices != NULL);
           NextRegister = FamilySpecificServices->RegisterList;
           while (NextRegister->AddressValue != ILLEGAL_SBDFO) {
@@ -187,7 +187,7 @@ PreserveMailboxes (
     for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) {
       for (Module = 0; Module < GetPlatformNumberOfModules (); Module++) {
         if (GetPciAddress (StdHeader, Socket, Module, &BaseAddress, &IgnoredStatus)) {
-          GetFeatureServicesOfSocket (&PreserveMailboxFamilyServiceTable, Socket, &FamilySpecificServices, StdHeader);
+          GetFeatureServicesOfSocket (&PreserveMailboxFamilyServiceTable, Socket, (const VOID **)&FamilySpecificServices, StdHeader);
           NextRegister = FamilySpecificServices->RegisterList;
           while (NextRegister->AddressValue != ILLEGAL_SBDFO) {
             ASSERT (RegisterEntryIndex <
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuC6State.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuC6State.c
index bcc3bd87d6..010162f727 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuC6State.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuC6State.c
@@ -122,7 +122,7 @@ IsC6FeatureEnabled (
     IsEnabled = TRUE;
     for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) {
       if (IsProcessorPresent (Socket, StdHeader)) {
-        GetFeatureServicesOfSocket (&C6FamilyServiceTable, Socket, &FamilyServices, StdHeader);
+        GetFeatureServicesOfSocket (&C6FamilyServiceTable, Socket, (const VOID **)&FamilyServices, StdHeader);
         if ((FamilyServices == NULL) || !FamilyServices->IsC6Supported (FamilyServices, Socket, StdHeader)) {
           IsEnabled = FALSE;
           break;
@@ -154,7 +154,7 @@ InitializeC6Feature (
 {
   UINT32  BscSocket;
   UINT32  Ignored;
-  UINT32  BscCore;
+  UINT32  BscCoreNum;
   UINT32  Core;
   UINT32  Socket;
   UINT32  NumberOfSockets;
@@ -175,8 +175,8 @@ InitializeC6Feature (
 
   if ((EntryPoint & (CPU_FEAT_AFTER_POST_MTRR_SYNC | CPU_FEAT_AFTER_RESUME_MTRR_SYNC)) != 0) {
     // Load any required microcode patches on both normal boot and resume from S3.
-    IdentifyCore (StdHeader, &BscSocket, &Ignored, &BscCore, &IgnoredSts);
-    GetFeatureServicesOfSocket (&C6FamilyServiceTable, BscSocket, &C6FamilyServices, StdHeader);
+    IdentifyCore (StdHeader, &BscSocket, &Ignored, &BscCoreNum, &IgnoredSts);
+    GetFeatureServicesOfSocket (&C6FamilyServiceTable, BscSocket, (const VOID **)&C6FamilyServices, StdHeader);
     if (C6FamilyServices != NULL) {
       C6FamilyServices->ReloadMicrocodePatchAfterMemInit (StdHeader);
     }
@@ -189,13 +189,13 @@ InitializeC6Feature (
 
     for (Socket = 0; Socket < NumberOfSockets; Socket++) {
       if (IsProcessorPresent (Socket, StdHeader)) {
-        GetFeatureServicesOfSocket (&C6FamilyServiceTable, Socket, &C6FamilyServices, StdHeader);
+        GetFeatureServicesOfSocket (&C6FamilyServiceTable, Socket, (const VOID **)&C6FamilyServices, StdHeader);
         if (C6FamilyServices != NULL) {
           // run code on all APs
           TaskPtr.FuncAddress.PfApTask = C6FamilyServices->ReloadMicrocodePatchAfterMemInit;
           if (GetActiveCoresInGivenSocket (Socket, &NumberOfCores, StdHeader)) {
             for (Core = 0; Core < NumberOfCores; Core++) {
-              if ((Socket != BscSocket) || (Core != BscCore)) {
+              if ((Socket != BscSocket) || (Core != BscCoreNum)) {
                 ApUtilRunCodeOnSocketCore ((UINT8) Socket, (UINT8) Core, &TaskPtr, StdHeader);
               }
             }
@@ -230,7 +230,7 @@ EnableC6OnSocket (
 
   IDS_HDT_CONSOLE (CPU_TRACE, "    C6 is enabled\n");
 
-  GetFeatureServicesOfCurrentCore (&C6FamilyServiceTable, &FamilyServices, StdHeader);
+  GetFeatureServicesOfCurrentCore (&C6FamilyServiceTable, (const VOID **)&FamilyServices, StdHeader);
   FamilyServices->InitializeC6 (FamilyServices,
                                 *((UINT64 *) EntryPoint),
                                 &CpuEarlyParams->PlatformConfig,
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCacheFlushOnHalt.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCacheFlushOnHalt.c
index 3187212fdd..0f40155921 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCacheFlushOnHalt.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCacheFlushOnHalt.c
@@ -97,6 +97,14 @@ EnableCacheFlushOnHaltOnSocket (
   IN       AMD_CONFIG_PARAMS *StdHeader,
   IN       AMD_CPU_EARLY_PARAMS *CpuEarlyParams
   );
+
+AGESA_STATUS
+InitializeCacheFlushOnHaltFeature (
+  IN       UINT64                 EntryPoint,
+  IN       PLATFORM_CONFIGURATION *PlatformConfig,
+  IN OUT   AMD_CONFIG_PARAMS      *StdHeader
+  );
+
 /*----------------------------------------------------------------------------------------
  *                          P U B L I C     F U N C T I O N S
  *----------------------------------------------------------------------------------------
@@ -178,7 +186,7 @@ EnableCacheFlushOnHaltOnSocket (
 {
   CPU_CFOH_FAMILY_SERVICES *FamilyServices;
 
-  GetFeatureServicesOfCurrentCore (&CacheFlushOnHaltFamilyServiceTable, &FamilyServices, StdHeader);
+  GetFeatureServicesOfCurrentCore (&CacheFlushOnHaltFamilyServiceTable, (const VOID **)&FamilyServices, StdHeader);
   if (FamilyServices != NULL) {
     FamilyServices->SetCacheFlushOnHaltRegister (FamilyServices, *((UINT64 *) EntryPoint), &CpuEarlyParams->PlatformConfig, StdHeader);
   }
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCacheInit.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCacheInit.c
index a38434a1cb..6d067456f3 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCacheInit.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCacheInit.c
@@ -220,8 +220,8 @@ AllocateExecutionCache (
   IDS_HDT_CONSOLE (CPU_TRACE, "  Cache size available for execution cache: 0x%x\n", AmdGetExeSize.AvailableExeCacheSize);
   RemainingExecutionCacheSize = AmdGetExeSize.AvailableExeCacheSize - CurrentAllocatedExeCacheSize;
 
-  GetCpuServicesOfCurrentCore (&FamilySpecificServices, StdHeader);
-  FamilySpecificServices->GetCacheInfo (FamilySpecificServices, &CacheInfoPtr, &Ignored, StdHeader);
+  GetCpuServicesOfCurrentCore ((const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
+  FamilySpecificServices->GetCacheInfo (FamilySpecificServices, (const VOID **)&CacheInfoPtr, &Ignored, StdHeader);
 
   // Process each request entry 0 to 2
   for (i = 0; i < 3; i++) {
@@ -451,8 +451,8 @@ AmdGetAvailableExeCacheSize (
   AGESA_STATUS IgnoredStatus;
   CPU_SPECIFIC_SERVICES *FamilySpecificServices;
 
-  GetCpuServicesOfCurrentCore (&FamilySpecificServices, &AmdGetExeSizeParams->StdHeader);
-  FamilySpecificServices->GetCacheInfo (FamilySpecificServices, &CacheInfoPtr, &Ignored, &AmdGetExeSizeParams->StdHeader);
+  GetCpuServicesOfCurrentCore ((const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, &AmdGetExeSizeParams->StdHeader);
+  FamilySpecificServices->GetCacheInfo (FamilySpecificServices, (const VOID **)&CacheInfoPtr, &Ignored, &AmdGetExeSizeParams->StdHeader);
   // CAR_EXE mode is either "Limited by L2 size" or "Infinite Execution space"
   ASSERT (CacheInfoPtr->CarExeType < MaxCarExeMode);
   if (CacheInfoPtr->CarExeType == InfiniteExe) {
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCoreLeveling.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCoreLeveling.c
index c6d902c1d2..700f9aeec8 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCoreLeveling.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCoreLeveling.c
@@ -318,7 +318,7 @@ CoreLevelingAtEarly (
   // Set down core register
   for (Socket = 0; Socket < NumberOfSockets; Socket++) {
     if (IsProcessorPresent (Socket, StdHeader)) {
-      GetFeatureServicesOfSocket (&CoreLevelingFamilyServiceTable, Socket, &FamilySpecificServices, StdHeader);
+      GetFeatureServicesOfSocket (&CoreLevelingFamilyServiceTable, Socket, (const VOID **)&FamilySpecificServices, StdHeader);
       if (FamilySpecificServices != NULL) {
         for (Module = 0; Module < NumberOfModules; Module++) {
           RegUpdated = FamilySpecificServices->SetDownCoreRegister (FamilySpecificServices, &Socket, &Module, &LeveledCores, CoreLevelMode, StdHeader);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCpb.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCpb.c
index 50264f0f21..e31c6b80b2 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCpb.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuCpb.c
@@ -108,7 +108,7 @@ IsCpbFeatureEnabled (
   if (PlatformConfig->CpbMode == CpbModeAuto) {
     for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) {
       if (IsProcessorPresent (Socket, StdHeader)) {
-        GetFeatureServicesOfSocket (&CpbFamilyServiceTable, Socket, &FamilyServices, StdHeader);
+        GetFeatureServicesOfSocket (&CpbFamilyServiceTable, Socket, (const VOID **)&FamilyServices, StdHeader);
         if (FamilyServices != NULL) {
           if (FamilyServices->IsCpbSupported (FamilyServices, PlatformConfig, Socket, StdHeader)) {
             IsEnabled = TRUE;
@@ -152,7 +152,7 @@ InitializeCpbFeature (
 
   for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) {
     if (IsProcessorPresent (Socket, StdHeader)) {
-      GetFeatureServicesOfSocket (&CpbFamilyServiceTable, Socket, &FamilyServices, StdHeader);
+      GetFeatureServicesOfSocket (&CpbFamilyServiceTable, Socket, (const VOID **)&FamilyServices, StdHeader);
       if (FamilyServices != NULL) {
         if (FamilyServices->IsCpbSupported (FamilyServices, PlatformConfig, Socket, StdHeader)) {
           CalledStatus = FamilyServices->EnableCpbOnSocket (FamilyServices, PlatformConfig, EntryPoint, Socket, StdHeader);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuDmi.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuDmi.c
index eb2d509818..0bf357d87a 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuDmi.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuDmi.c
@@ -92,6 +92,28 @@ IntToString (
   IN       UINT8 SizeInByte
 );
 
+AGESA_STATUS
+GetDmiInfoStub (
+  IN OUT   AMD_CONFIG_PARAMS     *StdHeader,
+  IN OUT   DMI_INFO              **DmiTable
+  );
+
+AGESA_STATUS
+GetDmiInfoMain (
+  IN OUT   AMD_CONFIG_PARAMS     *StdHeader,
+  IN OUT   DMI_INFO              **DmiTable
+  );
+
+AGESA_STATUS
+ReleaseDmiBufferStub (
+  IN OUT   AMD_CONFIG_PARAMS     *StdHeader
+  );
+
+AGESA_STATUS
+ReleaseDmiBuffer (
+  IN OUT   AMD_CONFIG_PARAMS     *StdHeader
+  );
+
 /*----------------------------------------------------------------------------------------
  *                          E X P O R T E D    F U N C T I O N S
  *----------------------------------------------------------------------------------------
@@ -183,7 +205,7 @@ GetDmiInfoMain (
   UINT16 NumberOfDimm;
   UINT32 SocketNum;
   UINT64 MsrData;
-  UINT64 MsrRegister;
+  UINT64 MsrReg;
   BOOLEAN FamilyNotFound;
   AGESA_STATUS Flag;
   AGESA_STATUS CalledStatus;
@@ -357,12 +379,12 @@ GetDmiInfoMain (
     // TYPE 19
     DmiBufferPtr->T19.StartingAddr = 0;
 
-    LibAmdMsrRead (TOP_MEM2, &MsrRegister, StdHeader);
-    if (MsrRegister == 0) {
-      LibAmdMsrRead (TOP_MEM, &MsrRegister, StdHeader);
-      DmiBufferPtr->T19.EndingAddr = (UINT32) (MsrRegister >> 10);
-    } else if (MsrRegister != 0) {
-      DmiBufferPtr->T19.EndingAddr = (UINT32) (MsrRegister >> 10);
+    LibAmdMsrRead (TOP_MEM2, &MsrReg, StdHeader);
+    if (MsrReg == 0) {
+      LibAmdMsrRead (TOP_MEM, &MsrReg, StdHeader);
+      DmiBufferPtr->T19.EndingAddr = (UINT32) (MsrReg >> 10);
+    } else if (MsrReg != 0) {
+      DmiBufferPtr->T19.EndingAddr = (UINT32) (MsrReg >> 10);
     }
 
     DmiBufferPtr->T19.PartitionWidth = 0xFF;
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuFeatureLeveling.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuFeatureLeveling.c
index afa222600e..2d11ffa6c0 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuFeatureLeveling.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuFeatureLeveling.c
@@ -130,7 +130,7 @@ FeatureLeveling (
 {
   UINT32 BscSocket;
   UINT32 Ignored;
-  UINT32 BscCore;
+  UINT32 BscCoreNum;
   UINT32 Socket;
   UINT32 Core;
   UINT32 NumberOfSockets;
@@ -151,7 +151,7 @@ FeatureLeveling (
   *NeedLeveling = FALSE;
 
   LibAmdMemFill (globalCpuFeatureList, 0xFF, sizeof (CPU_FEATURES_LIST), StdHeader);
-  IdentifyCore (StdHeader, &BscSocket, &Ignored, &BscCore, &IgnoredSts);
+  IdentifyCore (StdHeader, &BscSocket, &Ignored, &BscCoreNum, &IgnoredSts);
   NumberOfSockets = GetPlatformNumberOfSockets ();
 
   TaskPtr.FuncAddress.PfApTaskI = SaveFeatures;
@@ -174,7 +174,7 @@ FeatureLeveling (
     for (Socket = 0; Socket < NumberOfSockets; Socket++) {
       if (GetActiveCoresInGivenSocket (Socket, &NumberOfCores, StdHeader)) {
         for (Core = 0; Core < NumberOfCores; Core++) {
-          if ((Socket != BscSocket) || (Core != BscCore)) {
+          if ((Socket != BscSocket) || (Core != BscCoreNum)) {
             ApUtilRunCodeOnSocketCore ((UINT8)Socket, (UINT8)Core, &TaskPtr, StdHeader);
           }
         }
@@ -210,7 +210,7 @@ SaveFeatures (
   CPU_SPECIFIC_SERVICES *FamilySpecificServices;
   FamilySpecificServices = NULL;
 
-  GetCpuServicesOfCurrentCore (&FamilySpecificServices, StdHeader);
+  GetCpuServicesOfCurrentCore ((const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
   FamilySpecificServices->SaveFeatures (FamilySpecificServices, cpuFeatureListPtr, StdHeader);
 }
 
@@ -235,7 +235,7 @@ WriteFeatures (
   CPU_SPECIFIC_SERVICES *FamilySpecificServices;
   FamilySpecificServices = NULL;
 
-  GetCpuServicesOfCurrentCore (&FamilySpecificServices, StdHeader);
+  GetCpuServicesOfCurrentCore ((const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
   FamilySpecificServices->WriteFeatures (FamilySpecificServices, cpuFeatureListPtr, StdHeader);
 }
 
@@ -258,9 +258,9 @@ GetGlobalCpuFeatureListAddress (
   IN       AMD_CONFIG_PARAMS *StdHeader
   )
 {
-  UINT64 AddressValue;
+  VOID *AddressValue;
 
-  AddressValue = GLOBAL_CPU_FEATURE_LIST_TEMP_ADDR;
+  AddressValue = (VOID *)GLOBAL_CPU_FEATURE_LIST_TEMP_ADDR;
 
   *Address = (UINT64 *)(AddressValue);
 }
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuFeatures.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuFeatures.c
index fa18acf6fe..799fed0fe7 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuFeatures.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuFeatures.c
@@ -178,7 +178,7 @@ IsNonCoherentHt1 (
 
   for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) {
     if (IsProcessorPresent (Socket, StdHeader)) {
-      GetCpuServicesOfSocket (Socket, &CpuServices, StdHeader);
+      GetCpuServicesOfSocket (Socket, (const CPU_SPECIFIC_SERVICES **)&CpuServices, StdHeader);
       for (Module = 0; Module < GetPlatformNumberOfModules (); Module++) {
         if (GetPciAddress (StdHeader, Socket, Module, &PciAddress, &AgesaStatus)) {
           HtHostFeats.HtHostValue = 0;
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuHtAssist.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuHtAssist.c
index c0c3e0a91f..9370afdddf 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuHtAssist.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuHtAssist.c
@@ -135,7 +135,7 @@ IsHtAssistEnabled (
     if (IsEnabled) {
       for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) {
         if (IsProcessorPresent (Socket, StdHeader)) {
-          GetFeatureServicesOfSocket (&HtAssistFamilyServiceTable, Socket, &FamilyServices, StdHeader);
+          GetFeatureServicesOfSocket (&HtAssistFamilyServiceTable, Socket, (const VOID **)&FamilyServices, StdHeader);
           if ((FamilyServices == NULL) || !FamilyServices->IsHtAssistSupported (FamilyServices, Socket, StdHeader)) {
             IsEnabled = FALSE;
             break;
@@ -197,7 +197,7 @@ InitializeHtAssistFeature (
   // cache is still enabled.
   for (Socket = 0; Socket < MAX_SOCKETS_SUPPORTED; Socket++) {
     if (IsProcessorPresent (Socket, StdHeader)) {
-      GetFeatureServicesOfSocket (&HtAssistFamilyServiceTable, Socket, &FamilyServices[Socket], StdHeader);
+      GetFeatureServicesOfSocket (&HtAssistFamilyServiceTable, Socket, (const VOID **)&FamilyServices[Socket], StdHeader);
     } else {
       FamilyServices[Socket] = NULL;
     }
@@ -303,7 +303,7 @@ DisableAllCaches (
   UINT32   CR0Data;
   HT_ASSIST_FAMILY_SERVICES  *FamilyServices;
 
-  GetFeatureServicesOfCurrentCore (&HtAssistFamilyServiceTable, &FamilyServices, &ApExeParams->StdHeader);
+  GetFeatureServicesOfCurrentCore (&HtAssistFamilyServiceTable, (const VOID **)&FamilyServices, &ApExeParams->StdHeader);
 
   FamilyServices->HookDisableCache (FamilyServices, &ApExeParams->StdHeader);
 
@@ -341,7 +341,7 @@ EnableAllCaches (
   CR0Data &= ~(0x60000000);
   LibAmdWriteCpuReg (0, CR0Data);
 
-  GetFeatureServicesOfCurrentCore (&HtAssistFamilyServiceTable, &FamilyServices, &ApExeParams->StdHeader);
+  GetFeatureServicesOfCurrentCore (&HtAssistFamilyServiceTable, (const VOID **)&FamilyServices, &ApExeParams->StdHeader);
 
   FamilyServices->HookEnableCache (FamilyServices, &ApExeParams->StdHeader);
 
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuHwC1e.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuHwC1e.c
index b5b62c733a..c3542a19ae 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuHwC1e.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuHwC1e.c
@@ -117,7 +117,7 @@ IsHwC1eFeatureEnabled (
         if (GetNumberOfProcessors (StdHeader) == 1) {
           GetApMailbox (&ApMailboxes.ApMailInfo.Info, StdHeader);
           if (ApMailboxes.ApMailInfo.Fields.ModuleType == 0) {
-            GetFeatureServicesOfCurrentCore (&HwC1eFamilyServiceTable, &FamilyServices, StdHeader);
+            GetFeatureServicesOfCurrentCore (&HwC1eFamilyServiceTable, (const VOID **)&FamilyServices, StdHeader);
             if (FamilyServices != NULL) {
               IsEnabled = FamilyServices->IsHwC1eSupported (FamilyServices, StdHeader);
             }
@@ -157,7 +157,7 @@ InitializeHwC1eFeature (
   IDS_HDT_CONSOLE (CPU_TRACE, "    HW C1e is enabled\n");
 
   if (IsWarmReset (StdHeader)) {
-    GetFeatureServicesOfCurrentCore (&HwC1eFamilyServiceTable, &FamilyServices, StdHeader);
+    GetFeatureServicesOfCurrentCore (&HwC1eFamilyServiceTable, (const VOID **)&FamilyServices, StdHeader);
     CalledStatus = FamilyServices->InitializeHwC1e (FamilyServices, EntryPoint, PlatformConfig, StdHeader);
     if (CalledStatus > AgesaStatus) {
       AgesaStatus = CalledStatus;
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuIoCstate.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuIoCstate.c
index 8893415d38..46a8ece031 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuIoCstate.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuIoCstate.c
@@ -118,7 +118,7 @@ IsIoCstateFeatureSupported (
   if ((PlatformConfig->CStateIoBaseAddress != 0) && (PlatformConfig->CStateIoBaseAddress <= 0xFFF8)) {
     for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) {
       if (IsProcessorPresent (Socket, StdHeader)) {
-        GetFeatureServicesOfSocket (&IoCstateFamilyServiceTable, Socket, &IoCstateServices, StdHeader);
+        GetFeatureServicesOfSocket (&IoCstateFamilyServiceTable, Socket, (const VOID **)&IoCstateServices, StdHeader);
         if (IoCstateServices != NULL) {
           if (IoCstateServices->IsIoCstateSupported (IoCstateServices, Socket, StdHeader)) {
             IsSupported = TRUE;
@@ -193,7 +193,7 @@ EnableIoCstateOnSocket (
 {
   IO_CSTATE_FAMILY_SERVICES *FamilyServices;
 
-  GetFeatureServicesOfCurrentCore (&IoCstateFamilyServiceTable, &FamilyServices, StdHeader);
+  GetFeatureServicesOfCurrentCore (&IoCstateFamilyServiceTable, (const VOID **)&FamilyServices, StdHeader);
   FamilyServices->InitializeIoCstate (FamilyServices,
                                      *((UINT64 *) EntryPoint),
                                      &CpuEarlyParams->PlatformConfig,
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuLowPwrPstate.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuLowPwrPstate.c
index 0b29512dac..8d5cbd1bd9 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuLowPwrPstate.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuLowPwrPstate.c
@@ -116,7 +116,7 @@ IsLowPwrPstateFeatureSupported (
   IsSupported = FALSE;
   for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) {
     if (IsProcessorPresent (Socket, StdHeader)) {
-      GetFeatureServicesOfSocket (&LowPwrPstateFamilyServiceTable, Socket, &FamilyServices, StdHeader);
+      GetFeatureServicesOfSocket (&LowPwrPstateFamilyServiceTable, Socket, (const VOID **)&FamilyServices, StdHeader);
       if (FamilyServices != NULL) {
         if (FamilyServices->IsLowPwrPstateSupported (FamilyServices, PlatformConfig, Socket, StdHeader)) {
           IsSupported = TRUE;
@@ -189,7 +189,7 @@ EnableLowPwrPstateOnSocket (
 {
   LOW_PWR_PSTATE_FAMILY_SERVICES *FamilyServices;
 
-  GetFeatureServicesOfCurrentCore (&LowPwrPstateFamilyServiceTable, &FamilyServices, StdHeader);
+  GetFeatureServicesOfCurrentCore (&LowPwrPstateFamilyServiceTable, (const VOID **)&FamilyServices, StdHeader);
   FamilyServices->EnableLowPwrPstate (FamilyServices,
                                          &CpuEarlyParams->PlatformConfig,
                                          *((UINT64 *) EntryPoint),
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuMsgBasedC1e.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuMsgBasedC1e.c
index f09b2b5046..9e68d93f49 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuMsgBasedC1e.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuMsgBasedC1e.c
@@ -127,7 +127,7 @@ IsMsgBasedC1eFeatureEnabled (
       } else {
         for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) {
           if (IsProcessorPresent (Socket, StdHeader)) {
-            GetFeatureServicesOfSocket (&MsgBasedC1eFamilyServiceTable, Socket, &FamilyServices, StdHeader);
+            GetFeatureServicesOfSocket (&MsgBasedC1eFamilyServiceTable, Socket, (const VOID **)&FamilyServices, StdHeader);
             if ((FamilyServices == NULL) || !FamilyServices->IsMsgBasedC1eSupported (FamilyServices, Socket, StdHeader)) {
               IsEnabled = FALSE;
               break;
@@ -197,7 +197,7 @@ EnableMsgC1eOnSocket (
 {
   MSG_BASED_C1E_FAMILY_SERVICES *FamilyServices;
 
-  GetFeatureServicesOfCurrentCore (&MsgBasedC1eFamilyServiceTable, &FamilyServices, StdHeader);
+  GetFeatureServicesOfCurrentCore (&MsgBasedC1eFamilyServiceTable, (const VOID **)&FamilyServices, StdHeader);
   FamilyServices->InitializeMsgBasedC1e (FamilyServices,
                                          *((UINT64 *) EntryPoint),
                                          &CpuEarlyParams->PlatformConfig,
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateGather.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateGather.c
index 96ac698fb5..3367b1350c 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateGather.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateGather.c
@@ -89,6 +89,18 @@ extern CPU_FAMILY_SUPPORT_TABLE            PstateFamilyServiceTable;
  *----------------------------------------------------------------------------
  */
 
+AGESA_STATUS
+PStateGatherStub (
+  IN       AMD_CONFIG_PARAMS *StdHeader,
+  IN OUT   S_CPU_AMD_PSTATE  *PStateStrucPtr
+  );
+
+AGESA_STATUS
+PStateGatherMain (
+  IN       AMD_CONFIG_PARAMS *StdHeader,
+  IN OUT   S_CPU_AMD_PSTATE  *PStateStrucPtr
+  );
+
 /*----------------------------------------------------------------------------
  *                            EXPORTED FUNCTIONS
  *
@@ -204,7 +216,7 @@ PStateGatherMain (
   ASSERT (IsBsp (StdHeader, &IgnoredSts));
 
   FamilyServices = NULL;
-  GetFeatureServicesOfCurrentCore (&PstateFamilyServiceTable, &FamilyServices, StdHeader);
+  GetFeatureServicesOfCurrentCore (&PstateFamilyServiceTable, (const VOID **)&FamilyServices, StdHeader);
   ASSERT (FamilyServices != NULL);
 
   PopulatedSockets = 1;
@@ -306,7 +318,7 @@ PStateGather (
   FamilyServices = NULL;
   PStateEnabled = FALSE;
 
-  GetFeatureServicesOfCurrentCore (&PstateFamilyServiceTable, &FamilyServices, StdHeader);
+  GetFeatureServicesOfCurrentCore (&PstateFamilyServiceTable, (const VOID **)&FamilyServices, StdHeader);
   ASSERT (FamilyServices != NULL);
 
   //
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateLeveling.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateLeveling.c
index a59b791a08..c0ba407847 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateLeveling.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateLeveling.c
@@ -107,6 +107,24 @@ PutCoreInPState0 (
   IN       AMD_CONFIG_PARAMS *StdHeader
   );
 
+AGESA_STATUS
+PStateLevelingStub (
+  IN OUT   S_CPU_AMD_PSTATE   *PStateStrucPtr,
+  IN       AMD_CONFIG_PARAMS  *StdHeader
+  );
+
+AGESA_STATUS
+PStateLevelingMain (
+  IN OUT   S_CPU_AMD_PSTATE   *PStateStrucPtr,
+  IN       AMD_CONFIG_PARAMS  *StdHeader
+  );
+
+VOID
+CorePstateRegModify (
+  IN       VOID               *CpuAmdPState,
+  IN       AMD_CONFIG_PARAMS  *StdHeader
+  );
+
 
 /**
  *---------------------------------------------------------------------------------------
@@ -874,7 +892,7 @@ PutAllCoreInPState0 (
   AP_TASK                 TaskPtr;
   UINT32                  BscSocket;
   UINT32                  Ignored;
-  UINT32                  BscCore;
+  UINT32                  BscCoreNum;
   UINT32                  Core;
   UINT32                  Socket;
   UINT32                  NumberOfSockets;
@@ -887,7 +905,7 @@ PutAllCoreInPState0 (
   TaskPtr.DataTransfer.DataPtr = PStateBufferPtr;
   TaskPtr.DataTransfer.DataTransferFlags = DATA_IN_MEMORY;
 
-  IdentifyCore (StdHeader, &BscSocket, &Ignored, &BscCore, &IgnoredSts);
+  IdentifyCore (StdHeader, &BscSocket, &Ignored, &BscCoreNum, &IgnoredSts);
   NumberOfSockets = GetPlatformNumberOfSockets ();
 
   PutCoreInPState0 (PStateBufferPtr, StdHeader);
@@ -895,7 +913,7 @@ PutAllCoreInPState0 (
   for (Socket = 0; Socket < NumberOfSockets; Socket++) {
     if (GetActiveCoresInGivenSocket (Socket, &NumberOfCores, StdHeader)) {
       for (Core = 0; Core < NumberOfCores; Core++) {
-        if ((Socket != (UINT32) BscSocket) || (Core != (UINT32) BscCore)) {
+        if ((Socket != (UINT32) BscSocket) || (Core != (UINT32) BscCoreNum)) {
           ApUtilRunCodeOnSocketCore ((UINT8) Socket, (UINT8) Core, &TaskPtr, StdHeader);
         }
       }
@@ -931,7 +949,7 @@ CorePstateRegModify (
   PSTATE_CPU_FAMILY_SERVICES   *FamilySpecificServices;
   FamilySpecificServices = NULL;
 
-  GetFeatureServicesOfCurrentCore (&PstateFamilyServiceTable, &FamilySpecificServices, StdHeader);
+  GetFeatureServicesOfCurrentCore (&PstateFamilyServiceTable, (const VOID **)&FamilySpecificServices, StdHeader);
   ASSERT (FamilySpecificServices != NULL)
   FamilySpecificServices->SetPStateLevelReg  (FamilySpecificServices, (S_CPU_AMD_PSTATE *) CpuAmdPState, StdHeader);
 }
@@ -956,7 +974,7 @@ StartPstateMsrModify (
   AP_TASK                 TaskPtr;
   UINT32                  BscSocket;
   UINT32                  Ignored;
-  UINT32                  BscCore;
+  UINT32                  BscCoreNum;
   UINT32                  Core;
   UINT32                  Socket;
   UINT32                  NumberOfSockets;
@@ -969,7 +987,7 @@ StartPstateMsrModify (
   TaskPtr.DataTransfer.DataPtr = CpuAmdPState;
   TaskPtr.DataTransfer.DataTransferFlags = DATA_IN_MEMORY;
 
-  IdentifyCore (StdHeader, &BscSocket, &Ignored, &BscCore, &IgnoredSts);
+  IdentifyCore (StdHeader, &BscSocket, &Ignored, &BscCoreNum, &IgnoredSts);
   NumberOfSockets = GetPlatformNumberOfSockets ();
 
   CorePstateRegModify (CpuAmdPState, StdHeader);
@@ -977,7 +995,7 @@ StartPstateMsrModify (
   for (Socket = 0; Socket < NumberOfSockets; Socket++) {
     if (GetActiveCoresInGivenSocket (Socket, &NumberOfCores, StdHeader)) {
       for (Core = 0; Core < NumberOfCores; Core++) {
-        if ((Socket != (UINT32) BscSocket) || (Core != (UINT32) BscCore)) {
+        if ((Socket != (UINT32) BscSocket) || (Core != (UINT32) BscCoreNum)) {
           ApUtilRunCodeOnSocketCore ((UINT8) Socket, (UINT8) Core, &TaskPtr, StdHeader);
         }
       }
@@ -1067,7 +1085,7 @@ PutCoreInPState0 (
     return;
   }
 
-  GetCpuServicesOfCurrentCore (&FamilySpecificServices, StdHeader);
+  GetCpuServicesOfCurrentCore ((const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
 
   FamilySpecificServices->TransitionPstate  (FamilySpecificServices, (UINT8) 0, (BOOLEAN) FALSE, StdHeader);
 }
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateTables.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateTables.c
index 428b3459cf..aa14af1b66 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateTables.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuPstateTables.c
@@ -81,14 +81,14 @@ extern CPU_FAMILY_SUPPORT_TABLE            IoCstateFamilyServiceTable;
 
 STATIC ACPI_TABLE_HEADER  ROMDATA CpuSsdtHdrStruct =
 {
-  'S','S','D','T',
+  {'S','S','D','T'},
   0,
   1,
   0,
-  'A','M','D',' ',' ',' ',
-  'P','O','W','E','R','N','O','W',
+  {'A','M','D',' ',' ',' '},
+  {'P','O','W','E','R','N','O','W'},
   1,
-  'A','M','D',' ',
+  {'A','M','D',' '},
   1
 };
 
@@ -105,6 +105,47 @@ STATIC ACPI_TABLE_HEADER  ROMDATA CpuSsdtHdrStruct =
  *----------------------------------------------------------------------------
  */
 
+UINT32
+CalAcpiTablesSize (
+  IN       S_CPU_AMD_PSTATE       *AmdPstatePtr,
+  IN       PLATFORM_CONFIGURATION *PlatformConfig,
+  IN       AMD_CONFIG_PARAMS      *StdHeader
+  );
+
+AGESA_STATUS
+GenerateSsdtStub (
+  IN       AMD_CONFIG_PARAMS      *StdHeader,
+  IN       PLATFORM_CONFIGURATION *PlatformConfig,
+  IN OUT   VOID                   **SsdtPtr
+  );
+
+UINT32
+CreateAcpiTablesStub (
+  IN       PLATFORM_CONFIGURATION *PlatformConfig,
+  IN       PSTATE_LEVELING        *PStateLevelingBuffer,
+  IN OUT   VOID                   **SsdtPtr,
+  IN       UINT8                  LocalApicId,
+  IN       AMD_CONFIG_PARAMS      *StdHeader
+  );
+
+UINT32
+CreatePStateAcpiTables (
+  IN       PLATFORM_CONFIGURATION *PlatformConfig,
+  IN       PSTATE_LEVELING        *PStateLevelingBuffer,
+  IN OUT   VOID                   **SsdtPtr,
+  IN       UINT8                  LocalApicId,
+  IN       AMD_CONFIG_PARAMS      *StdHeader
+  );
+
+UINT32
+CreateCStateAcpiTables (
+  IN       PLATFORM_CONFIGURATION *PlatformConfig,
+  IN       PSTATE_LEVELING        *PStateLevelingBuffer,
+  IN OUT   VOID                   **SsdtPtr,
+  IN       UINT8                  LocalApicId,
+  IN       AMD_CONFIG_PARAMS      *StdHeader
+  );
+
 /**
  *---------------------------------------------------------------------------------------
  *
@@ -147,7 +188,7 @@ CalAcpiTablesSize (
   MaxSocketNumberInSystem = AmdPstatePtr->TotalSocketInSystem;
 
   if (IsFeatureEnabled (IoCstate, PlatformConfig, StdHeader)) {
-    GetFeatureServicesOfCurrentCore (&IoCstateFamilyServiceTable, &IoCstateFamilyServices, StdHeader);
+    GetFeatureServicesOfCurrentCore (&IoCstateFamilyServiceTable, (const VOID **)&IoCstateFamilyServices, StdHeader);
     // If we're supporting multiple families, only proceed when IO Cstate family services are available
     if (IoCstateFamilyServices != NULL) {
       CstateAcpiObjSize = IoCstateFamilyServices->GetAcpiCstObj (IoCstateFamilyServices, PlatformConfig, StdHeader);
@@ -333,8 +374,8 @@ GenerateSsdt (
       }
       ScopeAcpiTablesStructPtr->ScopeNamePt1b__  = SCOPE_NAME__;
       ASSERT ((PlatformConfig->ProcessorScopeName0 >= 'A') && (PlatformConfig->ProcessorScopeName0 <= 'Z'))
-      ASSERT ((PlatformConfig->ProcessorScopeName1 >= 'A') && (PlatformConfig->ProcessorScopeName1 <= 'Z') || \
-              (PlatformConfig->ProcessorScopeName1 >= '0') && (PlatformConfig->ProcessorScopeName1 <= '9') || \
+      ASSERT (((PlatformConfig->ProcessorScopeName1 >= 'A') && (PlatformConfig->ProcessorScopeName1 <= 'Z')) || \
+              ((PlatformConfig->ProcessorScopeName1 >= '0') && (PlatformConfig->ProcessorScopeName1 <= '9')) || \
               (PlatformConfig->ProcessorScopeName1 == '_'))
 
       ScopeAcpiTablesStructPtr->ScopeNamePt2a_C  = PlatformConfig->ProcessorScopeName0;
@@ -555,7 +596,7 @@ CreatePStateAcpiTables (
       // Calculate PCI address for socket only
       GetPciAddress (StdHeader, (UINT32) PStateLevelingBuffer->SocketNumber, 0, &PciAddress, &IgnoredStatus);
       TransAndBusMastLatency = 0;
-      GetFeatureServicesOfSocket (&PstateFamilyServiceTable, (UINT32) PStateLevelingBuffer->SocketNumber, &FamilyServices, StdHeader);
+      GetFeatureServicesOfSocket (&PstateFamilyServiceTable, (UINT32) PStateLevelingBuffer->SocketNumber, (const VOID **)&FamilyServices, StdHeader);
       ASSERT (FamilyServices != NULL)
       FamilyServices->GetPstateLatency (  FamilyServices,
                                           PStateLevelingBuffer,
@@ -698,7 +739,7 @@ CreatePStateAcpiTables (
     pPsdBodyAcpiTables = (PSD_BODY *)     pXpssBodyAcpiTables;
     // Get Total Cores Per Node
     if (GetActiveCoresInGivenSocket ((UINT32) PStateLevelingBuffer->SocketNumber, &CoreCount1, StdHeader)) {
-      GetFeatureServicesOfSocket (&PstateFamilyServiceTable, (UINT32) PStateLevelingBuffer->SocketNumber, &FamilyServices, StdHeader);
+      GetFeatureServicesOfSocket (&PstateFamilyServiceTable, (UINT32) PStateLevelingBuffer->SocketNumber, (const VOID **)&FamilyServices, StdHeader);
       ASSERT (FamilyServices != NULL)
       if ((CoreCount1 != 1) && (OptionPstateLateConfiguration.CfgPstatePsd) &&
           FamilyServices->IsPstatePsdNeeded (FamilyServices, PlatformConfig, StdHeader)) {
@@ -819,7 +860,7 @@ CreateCStateAcpiTables (
   ObjSize = 0;
 
   if (IsFeatureEnabled (IoCstate, PlatformConfig, StdHeader)) {
-    GetFeatureServicesOfCurrentCore (&IoCstateFamilyServiceTable, &IoCstateFamilyServices, StdHeader);
+    GetFeatureServicesOfCurrentCore (&IoCstateFamilyServiceTable, (const VOID **)&IoCstateFamilyServices, StdHeader);
     // If we're supporting multiple families, only proceed when IO Cstate family services are available
     if (IoCstateFamilyServices != NULL) {
       IoCstateFamilyServices->CreateAcpiCstObj (IoCstateFamilyServices, LocalApicId, SsdtPtr, StdHeader);
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSlit.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSlit.c
index 70567223a9..6290afea28 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSlit.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSlit.c
@@ -77,14 +77,14 @@ extern OPTION_SLIT_CONFIGURATION OptionSlitConfiguration;  // global user config
 
 STATIC ACPI_TABLE_HEADER  ROMDATA CpuSlitHdrStruct =
 {
-  'S','L','I','T',
+  {'S','L','I','T'},
   0,
   1,
   0,
-  'A','M','D',' ',' ',' ',
-  'A','G','E','S','A',' ',' ',' ',
+  {'A','M','D',' ',' ',' '},
+  {'A','G','E','S','A',' ',' ',' '},
   1,
-  'A','M','D',' ',
+  {'A','M','D',' '},
   1
 };
 
@@ -97,6 +97,21 @@ STATIC ACPI_TABLE_HEADER  ROMDATA CpuSlitHdrStruct =
  *           P R O T O T Y P E S     O F     L O C A L     F U  N C T I O N S
  *----------------------------------------------------------------------------------------
  */
+
+AGESA_STATUS
+GetAcpiSlitStub (
+  IN OUT   AMD_CONFIG_PARAMS      *StdHeader,
+  IN       PLATFORM_CONFIGURATION *PlatformConfig,
+  IN OUT   VOID                   **SlitPtr
+  );
+
+AGESA_STATUS
+GetAcpiSlitMain (
+  IN OUT   AMD_CONFIG_PARAMS      *StdHeader,
+  IN       PLATFORM_CONFIGURATION *PlatformConfig,
+  IN OUT   VOID                   **SlitPtr
+   );
+
 VOID
 STATIC
 AcpiSlitHBufferFind (
@@ -104,12 +119,21 @@ AcpiSlitHBufferFind (
   IN       UINT8 **SocketTopologyPtr
   );
 
+AGESA_STATUS
+ReleaseSlitBufferStub (
+  IN OUT   AMD_CONFIG_PARAMS     *StdHeader
+  );
+
+AGESA_STATUS
+ReleaseSlitBuffer (
+  IN OUT   AMD_CONFIG_PARAMS     *StdHeader
+  );
+
 /*----------------------------------------------------------------------------------------
  *           P R O T O T Y P E S     O F     E X P O R T E D     F U  N C T I O N S
  *----------------------------------------------------------------------------------------
  */
 
-
 /*----------------------------------------------------------------------------------------
  *                          E X P O R T E D    F U N C T I O N S
  *----------------------------------------------------------------------------------------
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSrat.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSrat.c
index e3ba90244a..1fc2b88172 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSrat.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSrat.c
@@ -81,14 +81,14 @@ extern OPTION_SRAT_CONFIGURATION OptionSratConfiguration;  // global user config
  */
 STATIC CPU_SRAT_HEADER  ROMDATA CpuSratHdrStruct =
 {
-  'S','R','A','T',
+  {'S','R','A','T'},
   0,
   2,
   0,
-  'A','M','D',' ',' ',' ',
-  'A','G','E','S','A',' ',' ',' ',
+  {'A','M','D',' ',' ',' '},
+  {'A','G','E','S','A',' ',' ',' '},
   1,
-  'A','M','D',' ',
+  {'A','M','D',' '},
   1,
   1,
   {0, 0, 0, 0, 0, 0, 0, 0}
@@ -98,6 +98,18 @@ STATIC CPU_SRAT_HEADER  ROMDATA CpuSratHdrStruct =
  *           P R O T O T Y P E S     O F     L O C A L     F U  N C T I O N S
  *----------------------------------------------------------------------------------------
  */
+AGESA_STATUS
+GetAcpiSratStub (
+  IN OUT   AMD_CONFIG_PARAMS     *StdHeader,
+  IN OUT   VOID                  **SratPtr
+  );
+
+AGESA_STATUS
+GetAcpiSratMain (
+  IN OUT   AMD_CONFIG_PARAMS     *StdHeader,
+  IN OUT   VOID                  **SratPtr
+  );
+
 UINT8
 STATIC
 *MakeApicEntry (
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSwC1e.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSwC1e.c
index 9fe66ce872..3be7d06564 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSwC1e.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuSwC1e.c
@@ -121,7 +121,7 @@ IsSwC1eFeatureEnabled (
         if (GetNumberOfProcessors (StdHeader) == 1) {
           GetApMailbox (&ApMailboxes.ApMailInfo.Info, StdHeader);
           if (ApMailboxes.ApMailInfo.Fields.ModuleType == 0) {
-            GetFeatureServicesOfCurrentCore (&SwC1eFamilyServiceTable, &SwFamilyServices, StdHeader);
+            GetFeatureServicesOfCurrentCore (&SwC1eFamilyServiceTable, (const VOID **)&SwFamilyServices, StdHeader);
             if (SwFamilyServices != NULL) {
               IsEnabled = SwFamilyServices->IsSwC1eSupported (SwFamilyServices, StdHeader);
             }
@@ -160,7 +160,7 @@ InitializeSwC1eFeature (
   IDS_HDT_CONSOLE (CPU_TRACE, "    SW C1e is enabled\n");
 
   if (IsWarmReset (StdHeader)) {
-    GetFeatureServicesOfCurrentCore (&SwC1eFamilyServiceTable, &FamilyServices, StdHeader);
+    GetFeatureServicesOfCurrentCore (&SwC1eFamilyServiceTable, (const VOID **)&FamilyServices, StdHeader);
     AgesaStatus = FamilyServices->InitializeSwC1e (FamilyServices, EntryPoint, PlatformConfig, StdHeader);
   }
 
diff --git a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuWhea.c b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuWhea.c
index ca2bd24db4..76a68792ec 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuWhea.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/CPU/Feature/cpuWhea.c
@@ -85,6 +85,20 @@ CreateHestBank (
   IN       AMD_WHEA_INIT_DATA *WheaInitDataPtr
   );
 
+AGESA_STATUS
+GetAcpiWheaStub (
+  IN OUT   AMD_CONFIG_PARAMS    *StdHeader,
+  IN OUT   VOID                 **WheaMcePtr,
+  IN OUT   VOID                 **WheaCmcPtr
+  );
+
+AGESA_STATUS
+GetAcpiWheaMain (
+  IN OUT   AMD_CONFIG_PARAMS    *StdHeader,
+  IN OUT   VOID                 **WheaMcePtr,
+  IN OUT   VOID                 **WheaCmcPtr
+  );
+
 /*----------------------------------------------------------------------------------------
  *                          E X P O R T E D    F U N C T I O N S
  *----------------------------------------------------------------------------------------
@@ -178,8 +192,8 @@ GetAcpiWheaMain (
     return AGESA_ERROR;
   }
 
-  GetCpuServicesOfCurrentCore (&FamilySpecificServices, StdHeader);
-  FamilySpecificServices->GetWheaInitData (FamilySpecificServices, &WheaInitDataPtr, &Entries, StdHeader);
+  GetCpuServicesOfCurrentCore ((const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
+  FamilySpecificServices->GetWheaInitData (FamilySpecificServices, (const VOID **)&WheaInitDataPtr, &Entries, StdHeader);
 
   ASSERT (WheaInitDataPtr->HestBankNum <= BankNum);