summaryrefslogtreecommitdiff
path: root/src/vboot/secdata_tpm.c
diff options
context:
space:
mode:
authorYouness Alaoui <youness.alaoui@puri.sm>2017-05-25 15:40:13 -0500
committerMartin Roth <martinroth@google.com>2017-06-09 17:03:27 +0200
commitdebb785d59ac69384e688147d19d2409fc745e98 (patch)
tree8ea8ff061c3cf082e34af94f0efde9ab996096e5 /src/vboot/secdata_tpm.c
parent0ff3b73990657516717ac8808edbd41e54d5209d (diff)
purism/librem13v2: Update PCI config
Update devicetree PCI config based on board spec: - enable PCIe Root Ports 5 and 9 (wifi and nvme respectively) - enable PCIe CLKREQ on RP9, disable on RP5 - enable USB OTG - enable P2SB Note: PCIe RP5 is on 0.1c.0 despite this being labeled as RP1 Change-Id: Ia71ed25bd41668df1ee3e4b4e28f54482722452c Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/19939 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/vboot/secdata_tpm.c')
0 files changed, 0 insertions, 0 deletions