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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-04-27 23:28:31 +1000
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-04-28 20:14:58 +0200
commit9e308b9955760ca768b35420d5373e59f398d174 (patch)
tree3ff957e4b0e9f96958c181892ac1b10700bbe8c5 /src/superio
parent959adc3fcff5d2f943f9e064e1162cdb5e5f8ec3 (diff)
superio/winbond/w83627ehg: Convert romstage to generic component
Convert the serial init to the generic romstage component and corresponding boards using this sio. Change-Id: Ib9f981f43e047013f9cbe20a22246ee2ed3ecf50 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5589 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/superio')
-rw-r--r--src/superio/winbond/w83627ehg/early_serial.c10
-rw-r--r--src/superio/winbond/w83627ehg/w83627ehg.h7
2 files changed, 3 insertions, 14 deletions
diff --git a/src/superio/winbond/w83627ehg/early_serial.c b/src/superio/winbond/w83627ehg/early_serial.c
index 84eb12708b..346d6cf094 100644
--- a/src/superio/winbond/w83627ehg/early_serial.c
+++ b/src/superio/winbond/w83627ehg/early_serial.c
@@ -35,13 +35,3 @@ void pnp_exit_ext_func_mode(device_t dev)
u16 port = dev >> 8;
outb(0xaa, port);
}
-
-void w83627ehg_enable_serial(device_t dev, u16 iobase)
-{
- pnp_enter_ext_func_mode(dev);
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
- pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
- pnp_set_enable(dev, 1);
- pnp_exit_ext_func_mode(dev);
-}
diff --git a/src/superio/winbond/w83627ehg/w83627ehg.h b/src/superio/winbond/w83627ehg/w83627ehg.h
index e574cf3f16..02041fc5f9 100644
--- a/src/superio/winbond/w83627ehg/w83627ehg.h
+++ b/src/superio/winbond/w83627ehg/w83627ehg.h
@@ -19,8 +19,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#ifndef SUPERIO_WINBOND_W83627EHG_W83627EHG_H
-#define SUPERIO_WINBOND_W83627EHG_W83627EHG_H
+#ifndef SUPERIO_WINBOND_W83627EHG_H
+#define SUPERIO_WINBOND_W83627EHG_H
#define W83627EHG_FDC 0 /* Floppy */
#define W83627EHG_PP 1 /* Parallel port */
@@ -57,10 +57,9 @@
#if defined(__PRE_RAM__)
void w83627ehg_enable_dev(device_t dev, u16 iobase);
void w83627ehg_disable_dev(device_t dev);
-void w83627ehg_enable_serial(device_t dev, u16 iobase);
#endif
void pnp_enter_ext_func_mode(device_t dev);
void pnp_exit_ext_func_mode(device_t dev);
-#endif /* SUPERIO_WINBOND_W83627EHG_W83627EHG_H */
+#endif /* SUPERIO_WINBOND_W83627EHG_H */