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authorFabian Kunkel <fabi@adv.bruhnspace.com>2016-07-26 22:11:07 +0200
committerMartin Roth <martinroth@google.com>2016-07-31 19:58:12 +0200
commit1f9c07fcd735e2e55104d1b3a2672298a460d5fb (patch)
treecc6a9749cf7fc1e3765191439f15506fb874ab5c /src/superio
parent449fb9b6eb886a6bd364f9f5c5617e30152c013d (diff)
mainboard/bap/ode_e20XX: Change PCIe lines
This patch binds PCIe lanes 2 and 3 to one PCIe device. PCIe device 2.4 becomes x2. Tested with the connected FPGA on PCIe 2.4. FPGA doubles transfer rate from/to the AMD. Payload SeaBIOS 1.9.1 stable, Lubuntu 16.04, Kernel 4.4.0 Change-Id: Icee567272312a7df4c3b5a6db5b420a054ec3230 Signed-off-by: Fabian Kunkel <fabi@adv.bruhnspace.com> Reviewed-on: https://review.coreboot.org/15905 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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