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authorSubrata Banik <subratabanik@google.com>2022-12-01 09:23:07 +0530
committerNick Vaccaro <nvaccaro@google.com>2022-12-01 16:52:03 +0000
commit67dbbeaa300a3b1c361a11de6518ad2acada17c0 (patch)
tree40d581cdfe1109dc81027e4dd10c0b68d161356d /src/superio/smsc
parent366b205f2d9fa2bd8cf4e72da125b5036b7295e0 (diff)
soc/intel/alderlake: Drop duplicate macro `PCH_PWRM_BASE_SIZE`
This patch ensures dropping of the duplicate macro introduced with 'commit 9e4488ab06fd9c4 ("soc/intel/{adl,cmn}: Add/Remove LTR disqualification for UFS")' `PCH_PWRM_BASE_SIZE` macro represents the size of the PMC MMIO range which can be used as is even in ufs.asl file. BUG=b:252975357 TEST=Build and boot nirwen and see no issues in PLT runs. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Ic967c609e1330eca1b9e1143e7efd78db011f317 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70180 Reviewed-by: Reka Norman <rekanorman@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/superio/smsc')
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