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authorSubrata Banik <subratabanik@google.com>2022-12-19 18:24:13 +0530
committerSubrata Banik <subratabanik@google.com>2022-12-22 08:06:48 +0000
commit4225a796fa44efa372e398ce05d3eca3d819ed6e (patch)
treecfa19a9018b7a79abdce9d75df92b235e270e919 /src/superio/smsc/sio10n268/sio10n268.h
parentdd4acf643fd810c120f1bfccf161c3e58033dfe7 (diff)
soc/intel/{apl,cnl,jsl}: Enable EISA HID support for DPTF
This patch selects `HAVE_DPTF_EISA_HID` config for APL, CNL and JSL platform. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Ice01c5720ba7f15861899d89981225cb76f9fcd5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71109 Reviewed-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Diffstat (limited to 'src/superio/smsc/sio10n268/sio10n268.h')
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