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authorMary Ruthven <mruthven@chromium.org>2015-11-24 09:43:27 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-12-03 14:22:55 +0100
commita8aef3acbc0aea2dd594f7133a7024f3babf764a (patch)
tree659badd802486a57ff2fad1c430c606a207350d3 /src/superio/smsc/sio1036/superio.c
parent5b242f6307f1824d0833f957b9829952fa5ad54e (diff)
cbfs_spi: Initialize spi_flash when initializing cbfs_cache
Most devices do not use SPI before they initialize CBMEM. This change initializes spi_flash in the CBMEM_INIT_HOOK to initialize the postram cbfs cache so it is not overwritten when boot_device_init is called later. BUG=chromium:210230 BRANCH=none TEST=confirm that the first cbfs access can occur before RAM initialized and after on panther and jerry. Change-Id: If3b6efc04082190e81c3773c0d3ce116bb12421f Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 0ab242786a16eba7fb423694f6b266e27d7660ec Original-Change-Id: I5f884b473e51e6813fdd726bba06b56baf3841b0 Original-Signed-off-by: Mary Ruthven <mruthven@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/314311 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/12601 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/superio/smsc/sio1036/superio.c')
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