diff options
| author | Lee Leahy <leroy.p.leahy@intel.com> | 2015-04-20 15:24:54 -0700 |
|---|---|---|
| committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2015-06-24 17:05:06 +0200 |
| commit | 0946ec37aa4660ecf16d66cb1174a68df0afc4f0 (patch) | |
| tree | 7be11b3d97f09f9f5fd176b275d0df3a9c2692e4 /src/superio/smsc/sio1007/acpi/superio.asl | |
| parent | 4a8c19cc90464ad215395bd116c9dc95fc682cac (diff) | |
Intel Common SOC: Add romstage support
Provide a common romstage implementation for the Intel SOCs.
BRANCH=none
BUG=None
TEST=Build for Braswell
Change-Id: I80f5f8f0f36e9023117b07d4af5c806fff8157b6
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10050
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/superio/smsc/sio1007/acpi/superio.asl')
0 files changed, 0 insertions, 0 deletions