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| author | Subrata Banik <subratabanik@google.com> | 2022-04-18 11:30:38 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-21 13:07:58 +0000 |
| commit | 77334d49842f82497dbbcbd0da43bb134016198e (patch) | |
| tree | 23a976e225a2f3ca69714a1f2d6a642837f01e32 /src/superio/smsc/lpc47n217 | |
| parent | bca2f02ab7763f788db04c52673e7ba9d1a4b127 (diff) | |
soc/intel/cmn/lpc: Add APIs to enable/disable LPC write protect (WP)
This patch implements two APIs to perform LPC/eSPI write protect enable/
disable operation using PCI configuration space register 0xDC
(BIOS Controller).
BUG=b:211954778
TEST=Able to build and boot google/redrix to OS.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I8ce831218025a1d682ea2ad6be76901b0345b362
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63687
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/superio/smsc/lpc47n217')
0 files changed, 0 insertions, 0 deletions