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authorFelix Held <felix-coreboot@felixheld.de>2018-07-06 23:47:58 +0200
committerFelix Held <felix-coreboot@felixheld.de>2018-07-26 14:22:28 +0000
commite75bac3a00362562d5f053aed5dbcf2b597046de (patch)
treea3deffc3ec7cbfbc7a50f473964b6885b4b396ad /src/superio/smsc/lpc47m15x
parent968ac7914dedd97659dfa944e48b28e10ba0ab96 (diff)
sio/smsc/fdc37n972: add missing pnp_conf_mode field to ops struct
This patch makes it possible to enter the config mode of the super IO chip, so that changes can be made to the configuration registers. Change-Id: I7e31eaf217b3af2226c1e7d2f14f2ef7b0d7ddbe Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/27392 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Diffstat (limited to 'src/superio/smsc/lpc47m15x')
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