diff options
| author | Raul E Rangel <rrangel@chromium.org> | 2018-05-11 11:08:08 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-05-14 07:37:40 +0000 |
| commit | b3e0220a7df58a4e17b110ceccfad3e28f478578 (patch) | |
| tree | 6cb113983b9f3dc5e470a64cf60cd8969c40af01 /src/superio/smsc/lpc47b397 | |
| parent | 8af20c6403d99c86e3c83fb9b53ec5bf7f9d2a78 (diff) | |
timestamp: Increase max number of timestamps
I'm increasing the max because when AGESA tracing is enabled it will use
over 120 entries. I added some padding to the number incase more probes
are added. This only affects ramstage so the extra ram shouldn't matter.
BUG=b:64549506
TEST=boot on grunt and ran cbmem -t
Change-Id: I7a3d2d09c91c9e302d139e7f65fa9c85c4594de4
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://review.coreboot.org/26234
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/superio/smsc/lpc47b397')
0 files changed, 0 insertions, 0 deletions