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author | Felix Held <felix-coreboot@felixheld.de> | 2023-03-07 01:15:42 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-08 12:01:42 +0000 |
commit | 21a5ecd5d55fd3aa2b9b3946cb5592271b9209bd (patch) | |
tree | 17946736d719393527593bfaf517a0965924692b /src/superio/renesas/Makefile.inc | |
parent | 8ec90ac3ca5ef3eae6220fa408bba4fd84c70139 (diff) |
soc/amd/glinda/acpi: rework C state info table handling
Rework the way the C state info is generated before it gets passed to
acpigen_write_CST_package in generate_cpu_entries by separating the data
from the code. For this, the newly introduced common get_cstate_info
function is used. Separating the data from the code will eventually
allow moving generate_cpu_entries to the common AMD code.
The actual values in cstate_cfg_table haven't been checked against the
reference code yet.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I5157fc031c5b19d8633132222520f582620208c9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73503
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/superio/renesas/Makefile.inc')
0 files changed, 0 insertions, 0 deletions