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authorElyes HAOUAS <ehaouas@noos.fr>2018-11-13 10:03:31 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-11-19 08:17:06 +0000
commit0ce41f1a116a816e774ebbd1130d27d7ee70e7e9 (patch)
tree983a793e01bbf09ed1e9c74534d4b78f9d3f2866 /src/superio/nuvoton/nct5104d
parent16f9bf83e00c786275d3fcc9d512d145ef6c93c9 (diff)
src: Add required space after "switch"
Change-Id: I85cf93e30606bc7838852bd300a369e79370629a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29623 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/superio/nuvoton/nct5104d')
-rw-r--r--src/superio/nuvoton/nct5104d/superio.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/superio/nuvoton/nct5104d/superio.c b/src/superio/nuvoton/nct5104d/superio.c
index 47687e1122..bc9af3b117 100644
--- a/src/superio/nuvoton/nct5104d/superio.c
+++ b/src/superio/nuvoton/nct5104d/superio.c
@@ -30,7 +30,7 @@ static void set_irq_trigger_type(struct device *dev, bool trig_level)
reg26 |= CR26_LOCK_REG;
pnp_write_config(dev, GLOBAL_OPTION_CR26, reg26);
- switch(dev->path.pnp.device) {
+ switch (dev->path.pnp.device) {
//SP1 (UARTA) IRQ type selection (1:level,0:edge) is controlled by CR 10, bit 5
case NCT5104D_SP1:
reg10 = pnp_read_config(dev, IRQ_TYPE_SEL_CR10);
@@ -116,7 +116,7 @@ static void nct5104d_init(struct device *dev)
pnp_enter_conf_mode(dev);
- switch(dev->path.pnp.device) {
+ switch (dev->path.pnp.device) {
case NCT5104D_SP1:
case NCT5104D_SP2:
set_irq_trigger_type(dev, conf->irq_trigger_type != 0);