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authorSubrata Banik <subrata.banik@intel.com>2019-03-05 16:45:14 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-03-07 17:21:23 +0000
commit4f42eead361b8d6b2f96031bcaf4627f2a5ea8a6 (patch)
tree196fe33ef1bc30614a76d6a4a38d81cb57713d84 /src/superio/nsc
parent34508cd9ac51021721f3e9abfe2a69c8a9835a4b (diff)
arch/x86/postcar: Add separate timestamp for postcar stage
This patch adds dedicated timestamp value for postcar stage. TEST=Able to see "start of postcar" and "end of postcar" timestamp while executing cbmem -t after booting to chrome console. > cbmem -t 951:returning from FspMemoryInit 20,485,324 (20,103,067) 4:end of romstage 20,559,235 (73,910) 100:start of postcar 20,560,266 (1,031) 101:end of postcar 20,570,038 (9,772) Change-Id: I084f66949667ad598f811d4233b4e639bc4c113e Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31762 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/superio/nsc')
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