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authorDtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>2023-06-05 10:00:41 +0800
committerFelix Held <felix-coreboot@felixheld.de>2023-06-06 12:18:49 +0000
commit1659218d7c7e68beee752e701e4b7ba13369bcae (patch)
treee58a002d4c89de1a376d0fb5a854a40de7516f16 /src/superio/nsc
parente27bd13088dc597c32e46b88d93ff74c31dca792 (diff)
mb/google/nissa/var/uldren: Modify GPP_D7 and PCIE RP7
Uldren does not have PCIE device and should disable PCIE RP7 and GPP_D7 for preventing PCIe controller not power gate in S0ix. BUG=b:283735051 BRANCH=firmware-nissa-15217.B TEST=emerge-nissa coreboot chromeos-bootimage 1. PCIE RP7: cbmem -c | grep 'PCI: 00:1c.6' [SPEW ] PCI: 00:1c.6: enabled 0 [SPEW ] PCI: 00:1c.6: enabled 0 2. GPP_D7: iotools mmio_read32 0xfd6d0ab0 0x44000300 Change-Id: Ia8a2c0f5530c7a056e8d706c651cac1d49b2091c Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75644 Reviewed-by: Harsha B R <harsha.b.r@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Derek Huang <derekhuang@google.com>
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