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authorElyes HAOUAS <ehaouas@noos.fr>2020-08-26 18:36:13 +0200
committerFelix Held <felix-coreboot@felixheld.de>2020-09-11 22:19:38 +0000
commit9b54dfa1d0e3b67ee88db5dddc2f087e396179d1 (patch)
treef1bfad1696a022548c7af724b05d30041a2e6f11 /src/superio/nsc/pc87417
parentaa03f30e6ecd999cff5b0ad0f166d2ed7471b62b (diff)
src/superio: Use 'PNP_IDX_*' macros instead of magic numbers
Change-Id: I2f8d6d9e8b6e84bb6c2b4e73b0fbeca476130d05 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44833 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/superio/nsc/pc87417')
-rw-r--r--src/superio/nsc/pc87417/early_init.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/superio/nsc/pc87417/early_init.c b/src/superio/nsc/pc87417/early_init.c
index c3af2d7314..3c1f4dd038 100644
--- a/src/superio/nsc/pc87417/early_init.c
+++ b/src/superio/nsc/pc87417/early_init.c
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <arch/io.h>
+#include <device/pnp_def.h>
#include <device/pnp_ops.h>
#include <device/pnp.h>
#include <stdint.h>
@@ -27,7 +28,7 @@ void xbus_cfg(pnp_devfn_t dev)
/* Select proper BIOS size (4MB). */
pnp_write_config(dev, PC87417_XMEMCNF2,
(pnp_read_config(dev, PC87417_XMEMCNF2)) | 0x04);
- xbus_index = pnp_read_iobase(dev, 0x60);
+ xbus_index = pnp_read_iobase(dev, PNP_IDX_IO0);
/* Enable writes to devices attached to XCS0 (XBUS Chip Select 0). */
for (i = 0; i <= 0xf; i++)