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authorFred Reitberger <reitbergerfred@gmail.com>2022-06-09 11:04:37 -0400
committerFelix Held <felix-coreboot@felixheld.de>2022-06-10 15:21:57 +0000
commitf089f9b8c6fd72c068178bb2c94d0f96008c4612 (patch)
treef589ff4689f4032a9d39ea87df8c9d11cc476fb0 /src/superio/nsc/pc87382/pc87382.h
parentf9b5665d280faa35c6b41fe0c48a9e9e1afd634b (diff)
mb/chausie/ec: Set MS bit in SW02
Set the MS bit in EC SW02 register to enable s0i3 Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I97b6adf48b49635251c70015f1d87fd8ca11d539 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65070 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/superio/nsc/pc87382/pc87382.h')
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