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authorFelix Held <felix-coreboot@felixheld.de>2020-01-23 17:12:32 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-01-30 12:08:41 +0000
commit3f3eca9b32f7472469b6d4ce1ac155d9ce425749 (patch)
tree3649646f9ef3885bc08f7f332fec7e006ac9c7f7 /src/superio/nsc/common
parent874466481c59bbaceafc64c3631e8c705224033a (diff)
src/superio: replace license boilerplate with SPDX
The authors from the header of the files are added in a previous commit. Change-Id: Iafeaafb9689c65bd2f5de3960097ec0d4c1009e7 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38544 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/superio/nsc/common')
-rw-r--r--src/superio/nsc/common/Kconfig16
-rw-r--r--src/superio/nsc/common/early_serial.c20
-rw-r--r--src/superio/nsc/common/nsc.h18
3 files changed, 6 insertions, 48 deletions
diff --git a/src/superio/nsc/common/Kconfig b/src/superio/nsc/common/Kconfig
index e486071410..9b03b717ae 100644
--- a/src/superio/nsc/common/Kconfig
+++ b/src/superio/nsc/common/Kconfig
@@ -1,17 +1,5 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2011 Advanced Micro Devices, Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
+# SPDX-License-Identifier: GPL-2.0-only
+# This file is part of the coreboot project.
# Generic NSC romstage driver - Just enough UART initialisation code for
# pre-ram.
diff --git a/src/superio/nsc/common/early_serial.c b/src/superio/nsc/common/early_serial.c
index 0ac146f0aa..d91492056e 100644
--- a/src/superio/nsc/common/early_serial.c
+++ b/src/superio/nsc/common/early_serial.c
@@ -1,21 +1,5 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* This file is part of the coreboot project. */
#include <device/pnp_ops.h>
#include <device/pnp_def.h>
diff --git a/src/superio/nsc/common/nsc.h b/src/superio/nsc/common/nsc.h
index bc123d4d69..a4e438e8e0 100644
--- a/src/superio/nsc/common/nsc.h
+++ b/src/superio/nsc/common/nsc.h
@@ -1,19 +1,5 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
- * Copyright (C) 2014 Felix Held <felix-coreboot@felixheld.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/* This file is part of the coreboot project. */
#ifndef SUPERIO_NSC_COMMON_PRE_RAM_H
#define SUPERIO_NSC_COMMON_PRE_RAM_H