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author | Naresh Solanki <Naresh.Solanki@9elements.com> | 2023-05-24 11:24:28 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-06-06 12:20:32 +0000 |
commit | 82390fad4932f3bc6c2616684db4f2cbfc74b677 (patch) | |
tree | 4077471ba4c93a5b6f2f2365084130faf6077cf3 /src/superio/nsc/common/nsc.h | |
parent | a47dc10ea59311aa161c7b900b171d0a101d2cdc (diff) |
soc/intel/xeon_sp/spr: Add RMT config
This commit adds a configuration option to enable RMT in the coreboot
build for the Intel Xeon SP SPR platform.
Signed-off-by: Naresh Solanki <Naresh.Solanki@9elements.com>
Change-Id: I9b9276116c22cfbbec132d7a1b0026a52a51398a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75416
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Diffstat (limited to 'src/superio/nsc/common/nsc.h')
0 files changed, 0 insertions, 0 deletions