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author | Felix Held <felix.held@amd.corp-partner.google.com> | 2021-10-21 02:03:04 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-22 14:58:31 +0000 |
commit | 60e9114c621095285314cc530016d7930b327f34 (patch) | |
tree | 0b5bde2274e18feaaba0020a0f16bd6b1cd065f4 /src/superio/ite | |
parent | dc9b5efa8187ec886ab4ed360b8c4f9b2866c250 (diff) |
include/device: ensure valid link/bus is passed to mp_cpu_bus_init
When a chipset or mainboard devicetree doesn't have any LAPIC devices in
its CPU cluster, not only the LAPIC device, but also the link/bus
between the CPU cluster device and the LAPIC devices will be missing and
the CPU cluster's dev->link_list will be NULL. This patch handles this
case in the common code like
commit 3c0ecd57c174b7391c66d22406effe18ce570cac (soc/intel/common/cpu:
Handle non-zero BSP APIC ID in init_cpus) and
commit ba936ce5db819d5ecb34e83a998b2390ecbdc4b9 (soc/intel/denverton_ns:
Ensure CPU device has a valid link) already did in the common Intel SoC
and the Denverton code. With this change all CPUs and SoC that use the
common mp_cpu_bus_init as init function in the CPU cluster's device
operations struct won't require having at least one LAPIC device in the
chipset or mainboard device tree.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ib0d85de5cafb6390b8fbd512186899d6a815e972
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58508
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/superio/ite')
0 files changed, 0 insertions, 0 deletions