summaryrefslogtreecommitdiff
path: root/src/superio/ite/it8786e/acpi
diff options
context:
space:
mode:
authorFelix Held <felix-coreboot@felixheld.de>2020-01-23 17:12:32 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-01-30 12:08:41 +0000
commit3f3eca9b32f7472469b6d4ce1ac155d9ce425749 (patch)
tree3649646f9ef3885bc08f7f332fec7e006ac9c7f7 /src/superio/ite/it8786e/acpi
parent874466481c59bbaceafc64c3631e8c705224033a (diff)
src/superio: replace license boilerplate with SPDX
The authors from the header of the files are added in a previous commit. Change-Id: Iafeaafb9689c65bd2f5de3960097ec0d4c1009e7 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38544 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/superio/ite/it8786e/acpi')
-rw-r--r--src/superio/ite/it8786e/acpi/superio.asl17
1 files changed, 2 insertions, 15 deletions
diff --git a/src/superio/ite/it8786e/acpi/superio.asl b/src/superio/ite/it8786e/acpi/superio.asl
index 8ea0df1114..ba210bd0dd 100644
--- a/src/superio/ite/it8786e/acpi/superio.asl
+++ b/src/superio/ite/it8786e/acpi/superio.asl
@@ -1,18 +1,5 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2011 Christoph Grenz <christophg+cb@grenz-bonn.de>
- * Copyright (C) 2013, 2016 secunet Security Networks AG
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* This file is part of the coreboot project. */
/*
* Include this file into a mainboard's DSDT _SB device tree and it will