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author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-05-27 12:34:02 -0600 |
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committer | Martin L Roth <gaumless@tutanota.com> | 2022-05-29 14:44:20 +0000 |
commit | 5027d2de4d63359967b02ba1aecc04b8f34b1d69 (patch) | |
tree | 8930fcc73da86c8de60ac4cd947516229e2b0085 /src/superio/ite/it8623e | |
parent | fc32b8fea3f58e41e4db869444b26ac12dcd6606 (diff) |
mb/google/brya/var/agah: Fix GPU power sequencing
While testing the power sequencing code for the GPU, a few mistakes were
found. This patch fixes those errors:
1) FBVDD load-switch enable is active-low
2) NVVDD VR enable is active-high
3) GPU_PERST_L should be driven low during GPIO table programming
4) The BAR saving code missed the top 32 bits of 64-bit BARs
5) sequence_rail() assumed the pwr_en_gpio and pg_gpio were the same
polarity
6) PEG vGPIOs were not programmed to the correct NF
BUG=b:233552225
TEST=dGPU is able to successfully enumerate over PCIe bus
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I85767d382012a0c7dfdb1f849768e0160f06c273
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64727
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/superio/ite/it8623e')
0 files changed, 0 insertions, 0 deletions