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authorMartin Roth <gaumless@gmail.com>2017-10-15 15:06:48 -0600
committerMartin Roth <martinroth@google.com>2018-01-15 23:25:12 +0000
commit264566c177dac98e67c2a4765fe08c5d8de10753 (patch)
tree34cfe5ba3958d14dd976bd7f2a2fb58a3920c74d /src/superio/intel
parentf6af8943e23b8ffa27df6ddb8e4a654387be0cb6 (diff)
Intel i3100 boards & chips: Remove - using LATE_CBMEM_INIT
All boards and chips that are still using LATE_CBMEM_INIT are being removed as previously discussed. If these boards and chips are updated to not use LATE_CBMEM_INIT, they can be restored to the active codebase from the 4.7 branch. chips: northbridge/intel/i3100 southbridge/intel/i3100 superio/intel/i3100 cpu/intel/socket_mPGA479M Mainboards: mainboard/intel/truxton mainboard/intel/mtarvon mainboard/intel/truxton Change-Id: Ic2bbdc8ceb3ba0359c120cf4286b0c5b7dc653bb Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/22031 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/superio/intel')
-rw-r--r--src/superio/intel/i3100/Kconfig17
-rw-r--r--src/superio/intel/i3100/Makefile.inc18
-rw-r--r--src/superio/intel/i3100/early_serial.c54
-rw-r--r--src/superio/intel/i3100/i3100.h66
-rw-r--r--src/superio/intel/i3100/superio.c68
5 files changed, 0 insertions, 223 deletions
diff --git a/src/superio/intel/i3100/Kconfig b/src/superio/intel/i3100/Kconfig
deleted file mode 100644
index e797bd7dfa..0000000000
--- a/src/superio/intel/i3100/Kconfig
+++ /dev/null
@@ -1,17 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Ronald G. Minnich
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-config SUPERIO_INTEL_I3100
- bool
diff --git a/src/superio/intel/i3100/Makefile.inc b/src/superio/intel/i3100/Makefile.inc
deleted file mode 100644
index 840483d9c9..0000000000
--- a/src/superio/intel/i3100/Makefile.inc
+++ /dev/null
@@ -1,18 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2008 Arastra, Inc.
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-
-romstage-$(CONFIG_SUPERIO_INTEL_I3100) += early_serial.c
-ramstage-$(CONFIG_SUPERIO_INTEL_I3100) += superio.c
diff --git a/src/superio/intel/i3100/early_serial.c b/src/superio/intel/i3100/early_serial.c
deleted file mode 100644
index 0b0bb26825..0000000000
--- a/src/superio/intel/i3100/early_serial.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Arastra, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <arch/io.h>
-#include <device/pnp.h>
-#include <stdint.h>
-#include "i3100.h"
-
-static void pnp_enter_ext_func_mode(pnp_devfn_t dev)
-{
- u16 port = dev >> 8;
-
- outb(0x80, port);
- outb(0x86, port);
-}
-
-static void pnp_exit_ext_func_mode(pnp_devfn_t dev)
-{
- u16 port = dev >> 8;
-
- outb(0x68, port);
- outb(0x08, port);
-}
-
-/* Enable device interrupts, set UART_CLK predivide. */
-void i3100_configure_uart_clk(pnp_devfn_t dev, u8 predivide)
-{
- pnp_enter_ext_func_mode(dev);
- pnp_write_config(dev, I3100_SIW_CONFIGURATION, (predivide << 2) | 1);
- pnp_exit_ext_func_mode(dev);
-}
-
-void i3100_enable_serial(pnp_devfn_t dev, u16 iobase)
-{
- pnp_enter_ext_func_mode(dev);
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
- pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
- pnp_set_enable(dev, 1);
- pnp_exit_ext_func_mode(dev);
-}
diff --git a/src/superio/intel/i3100/i3100.h b/src/superio/intel/i3100/i3100.h
deleted file mode 100644
index fa71c058eb..0000000000
--- a/src/superio/intel/i3100/i3100.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Arastra, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef SUPERIO_INTEL_I3100_H
-#define SUPERIO_INTEL_I3100_H
-
-/*
- * Datasheet:
- * - Name: Intel 3100 Chipset
- * - URL: http://www.intel.com/design/intarch/datashts/313458.htm
- * - PDF: http://download.intel.com/design/intarch/datashts/31345803.pdf
- * - Revision / Date: 007, October 2008
- * - Order number: 313458-007US
- */
-
-/*
- * The SIW ("Serial I/O and Watchdog Timer") integrated into the i3100 is
- * very similar to a Super I/O, both in functionality and config mechanism.
- *
- * The SIW contains:
- * - UART(s)
- * - Serial interrupt controller
- * - Watchdog timer (WDT)
- * - LPC interface
- */
-
-/* Logical device numbers (LDNs). */
-#define I3100_SP1 0x04 /* Com1 */
-#define I3100_SP2 0x05 /* Com2 */
-#define I3100_WDT 0x06 /* Watchdog timer */
-
-/* Registers and bit definitions: */
-
-#define I3100_SIW_CONFIGURATION 0x29
-
-/*
- * SIW_CONFIGURATION[3:2] = UART_CLK predivide
- * 00: divide by 1
- * 01: divide by 8
- * 10: divide by 26
- * 11: reserved
- */
-#define I3100_UART_CLK_PREDIVIDE_1 0x00
-#define I3100_UART_CLK_PREDIVIDE_8 0x01
-#define I3100_UART_CLK_PREDIVIDE_26 0x02
-
-#include <arch/io.h>
-#include <stdint.h>
-
-void i3100_configure_uart_clk(pnp_devfn_t dev, u8 predivide);
-void i3100_enable_serial(pnp_devfn_t dev, u16 iobase);
-
-#endif /* SUPERIO_INTEL_I3100_H */
diff --git a/src/superio/intel/i3100/superio.c b/src/superio/intel/i3100/superio.c
deleted file mode 100644
index 1055b7af72..0000000000
--- a/src/superio/intel/i3100/superio.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2008 Arastra, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <stdlib.h>
-#include <device/device.h>
-#include <device/pnp.h>
-#include "i3100.h"
-#include <arch/io.h>
-
-static void pnp_enter_ext_func_mode(struct device *dev)
-{
- outb(0x80, dev->path.pnp.port);
- outb(0x86, dev->path.pnp.port);
-}
-
-static void pnp_exit_ext_func_mode(struct device *dev)
-{
- outb(0x68, dev->path.pnp.port);
- outb(0x08, dev->path.pnp.port);
-}
-
-static void i3100_init(struct device *dev)
-{
- if (!dev->enabled)
- return;
-}
-
-static const struct pnp_mode_ops pnp_conf_mode_ops = {
- .enter_conf_mode = pnp_enter_ext_func_mode,
- .exit_conf_mode = pnp_exit_ext_func_mode,
-};
-
-static struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = pnp_set_resources,
- .enable_resources = pnp_enable_resources,
- .enable = pnp_alt_enable,
- .init = i3100_init,
- .ops_pnp_mode = &pnp_conf_mode_ops,
-};
-
-static struct pnp_info pnp_dev_info[] = {
- { &ops, I3100_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
- { &ops, I3100_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
-};
-
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
-}
-
-struct chip_operations superio_intel_i3100_ops = {
- CHIP_NAME("Intel 3100 Super I/O")
- .enable_dev = enable_dev,
-};