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author | Edward O'Callaghan <quasisec@chromium.org> | 2019-10-23 00:28:39 +1100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-06 10:15:10 +0000 |
commit | b4741616ea3dc1f0b281376f9c5e0ffe75a1b15b (patch) | |
tree | 74f462a669397f8456d118f5b3535da5a479ca0e /src/superio/fintek | |
parent | fb2a9d5ed86d9d5e5d7a8b20e71df0deba3bc5c0 (diff) |
mainboard/google: Rework Hatch so that SPD in CBFS is optional
All Hatch variants so far embed static SPD data encoded within the
firmware image. However we wish the flexibility for romstage
implementations that allow for reading the SPD data dynamically over
SMBus.
BRANCH=none
BUG=b:143134702
TEST=./util/abuild/abuild -p none -t google/hatch -x -a
Change-Id: Ie1637d08cdd85bc8d7c3b6f2d6f386d0e0c6589b
Signed-off-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36250
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/superio/fintek')
0 files changed, 0 insertions, 0 deletions