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authorElyes HAOUAS <ehaouas@noos.fr>2020-03-30 16:44:54 +0200
committerFelix Held <felix-coreboot@felixheld.de>2020-03-31 18:59:08 +0000
commit8dcadc9189d538dfcc0d8247bcd027afd5697244 (patch)
treef8163fe7eeb54c7c4d1ff6c771b473d7864e71c1 /src/superio/fintek/f81866d/f81866d_uart.c
parent3e666898cd99f4e15a39e360bb594d499e738b2d (diff)
superio/fintek: Improve code formatting
Change-Id: I5ae2a2da1994fcc587540586d7404ebf18eb2ca0 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39928 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/superio/fintek/f81866d/f81866d_uart.c')
-rw-r--r--src/superio/fintek/f81866d/f81866d_uart.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/superio/fintek/f81866d/f81866d_uart.c b/src/superio/fintek/f81866d/f81866d_uart.c
index c6c18890b0..9590dc4e9c 100644
--- a/src/superio/fintek/f81866d/f81866d_uart.c
+++ b/src/superio/fintek/f81866d/f81866d_uart.c
@@ -36,13 +36,13 @@ void f81866d_uart_init(struct device *dev)
pnp_write_config(dev, PORT_SELECT_REGISTER, tmp & 0xFE);
// Set UART 3 function (Bit 4/5), otherwise pin 36-43 are GPIO
- if (dev->path.pnp.device == F81866D_SP3) {
+ if (dev->path.pnp.device == F81866D_SP3) {
tmp = pnp_read_config(dev, MULTI_FUNC_SEL3_REG);
pnp_write_config(dev, MULTI_FUNC_SEL3_REG, tmp | 0x30);
}
// Set UART 4 function (Bit 6/7), otherwise pin 44-51 are GPIO
- if (dev->path.pnp.device == F81866D_SP4) {
+ if (dev->path.pnp.device == F81866D_SP4) {
tmp = pnp_read_config(dev, MULTI_FUNC_SEL3_REG);
pnp_write_config(dev, MULTI_FUNC_SEL3_REG, tmp | 0xC0);
}