From 8dcadc9189d538dfcc0d8247bcd027afd5697244 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Mon, 30 Mar 2020 16:44:54 +0200 Subject: superio/fintek: Improve code formatting Change-Id: I5ae2a2da1994fcc587540586d7404ebf18eb2ca0 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/39928 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/superio/fintek/f81866d/f81866d_uart.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/superio/fintek/f81866d/f81866d_uart.c') diff --git a/src/superio/fintek/f81866d/f81866d_uart.c b/src/superio/fintek/f81866d/f81866d_uart.c index c6c18890b0..9590dc4e9c 100644 --- a/src/superio/fintek/f81866d/f81866d_uart.c +++ b/src/superio/fintek/f81866d/f81866d_uart.c @@ -36,13 +36,13 @@ void f81866d_uart_init(struct device *dev) pnp_write_config(dev, PORT_SELECT_REGISTER, tmp & 0xFE); // Set UART 3 function (Bit 4/5), otherwise pin 36-43 are GPIO - if (dev->path.pnp.device == F81866D_SP3) { + if (dev->path.pnp.device == F81866D_SP3) { tmp = pnp_read_config(dev, MULTI_FUNC_SEL3_REG); pnp_write_config(dev, MULTI_FUNC_SEL3_REG, tmp | 0x30); } // Set UART 4 function (Bit 6/7), otherwise pin 44-51 are GPIO - if (dev->path.pnp.device == F81866D_SP4) { + if (dev->path.pnp.device == F81866D_SP4) { tmp = pnp_read_config(dev, MULTI_FUNC_SEL3_REG); pnp_write_config(dev, MULTI_FUNC_SEL3_REG, tmp | 0xC0); } -- cgit v1.2.3