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authorDtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>2022-03-11 13:45:18 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-03-18 15:39:47 +0000
commitb24e45d215db9e0febed1b355b28f685caea2617 (patch)
treeb5ac2795ce0c1b792a9d22c59d309514f91dde78 /src/superio/fintek/f71808a
parent2b19d547c0866fef84bdb7b226ce7a4ac81af64f (diff)
mb/google/brya/var/kinox: Reconfigure GPIO settings
Configure GPIOs according to updated schematics. - GPP_A21 from NC to TCP_DP1_CTRLCLK. - GPP_A22 from NC to TCP_DP1_CTRLDATA. - GPP_E22 from DDIA_DP_CTRLCLK to NC. - GPP_E23 from DDIA_DP_CTRLDATA to NC. BUG=b:214025396 TEST=emerge-brask coreboot Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: I9d2d73820fbb191b682713e4e351c6375927ddf4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62749 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/superio/fintek/f71808a')
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