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authorTim Chu <Tim.Chu@quantatw.com>2022-12-13 12:11:45 +0000
committerLean Sheng Tan <sheng.tan@9elements.com>2023-03-19 09:53:41 +0000
commit84fe84da84be118b2758081cc6abbb31f8f3409c (patch)
tree72d075d2d5e202ee63e1c57d928e31128ccdb69f /src/superio/acpi
parent3ed903fda9cb9b7237067f301d1efdb297a05a24 (diff)
soc/intel/xeon_sp/Makefile.inc: Build EBG for SPR-SP
Intel SPR-SP chipset has EBG instead of LBG. Signed-off-by: Tim Chu <Tim.Chu@quantatw.com> Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com> Change-Id: I9429fe332bb5f01a41aa205c76ad9f0159f93eee Reviewed-on: https://review.coreboot.org/c/coreboot/+/71959 Reviewed-by: Jian-Ming Wang <jianmingW@supermicro.com> Reviewed-by: TimLiu-SMCI <timliu@supermicro.com.tw> Reviewed-by: Jonathan Zhang <jon.zhixiong.zhang@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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