diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2022-07-16 09:43:03 +0200 |
|---|---|---|
| committer | Martin L Roth <gaumless@tutanota.com> | 2022-07-17 21:53:49 +0000 |
| commit | ba9deba362cfed3a2a8d3d65db6333b23f59f4d9 (patch) | |
| tree | 58aa55fad0db0095c3b021a0025155751cec1662 /src/southbridge | |
| parent | 833582640c9504a52e17b4c5d413280bdf93429f (diff) | |
sb/amd/*/*/sata.c: Fix some white spaces issues
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I4c5dffb32e1ed858e93f95ed17eac894a9100501
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65896
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/sata.c | 6 | ||||
| -rw-r--r-- | src/southbridge/amd/pi/hudson/sata.c | 6 |
2 files changed, 6 insertions, 6 deletions
diff --git a/src/southbridge/amd/agesa/hudson/sata.c b/src/southbridge/amd/agesa/hudson/sata.c index c2348a963d..f04dd5980c 100644 --- a/src/southbridge/amd/agesa/hudson/sata.c +++ b/src/southbridge/amd/agesa/hudson/sata.c @@ -13,12 +13,12 @@ static void sata_init(struct device *dev) /************************************** * Configure the SATA port multiplier * **************************************/ - #define BYTE_TO_DWORD_OFFSET(x) (x/4) + #define BYTE_TO_DWORD_OFFSET(x) (x / 4) #define AHCI_BASE_ADDRESS_REG 0x24 #define MISC_CONTROL_REG 0x40 - #define UNLOCK_BIT (1<<0) + #define UNLOCK_BIT (1 << 0) #define SATA_CAPABILITIES_REG 0xFC - #define CFG_CAP_SPM (1<<12) + #define CFG_CAP_SPM (1 << 12) volatile u32 *ahci_ptr = (u32*)(uintptr_t)(pci_read_config32(dev, AHCI_BASE_ADDRESS_REG) & 0xFFFFFF00); diff --git a/src/southbridge/amd/pi/hudson/sata.c b/src/southbridge/amd/pi/hudson/sata.c index dd1e1824b5..381f7d3da9 100644 --- a/src/southbridge/amd/pi/hudson/sata.c +++ b/src/southbridge/amd/pi/hudson/sata.c @@ -13,12 +13,12 @@ static void sata_init(struct device *dev) /************************************** * Configure the SATA port multiplier * **************************************/ - #define BYTE_TO_DWORD_OFFSET(x) (x/4) + #define BYTE_TO_DWORD_OFFSET(x) (x / 4) #define AHCI_BASE_ADDRESS_REG 0x24 #define MISC_CONTROL_REG 0x40 - #define UNLOCK_BIT (1<<0) + #define UNLOCK_BIT (1 << 0) #define SATA_CAPABILITIES_REG 0xFC - #define CFG_CAP_SPM (1<<12) + #define CFG_CAP_SPM (1 << 12) volatile u32 *ahci_ptr = (u32*)(pci_read_config32(dev, AHCI_BASE_ADDRESS_REG) & 0xFFFFFF00); |