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| author | Werner Zeh <werner.zeh@siemens.com> | 2023-02-27 08:50:15 +0100 |
|---|---|---|
| committer | Elyes Haouas <ehaouas@noos.fr> | 2023-02-28 06:04:53 +0000 |
| commit | b40b2b1933934d93f88542518415458583c80e47 (patch) | |
| tree | f63dcd709a2a86f7b841f705e861bf80e16c4f30 /src/southbridge | |
| parent | 63c1f7b18767c444a876b224785543ac58482a56 (diff) | |
include/device/pci_def.h: Fix typo in comment
Fix typo in the comment for Common Clock Configuration.
Change-Id: Idd01e787458a9090d53b9a57547b8158480dcc16
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73311
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src/southbridge')
0 files changed, 0 insertions, 0 deletions