diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2022-11-22 17:36:02 +0100 |
|---|---|---|
| committer | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2022-11-30 03:07:23 +0000 |
| commit | 8b8ada6fdb3ebab672571c581eed3a7285589d83 (patch) | |
| tree | e54135b01dcd48a1c3b3db4e6f16efee8740a2b9 /src/southbridge | |
| parent | cc22607dbfbab0c9ce42c071b5b3c4a304845313 (diff) | |
/: Remove extra space after comma
Change-Id: Ic64625bdaf8c4e9f8a5c1c22cece7f4070012da7
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69903
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/bd82x6x/pch.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801gx/i82801gx.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/pch.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/pcie.c | 2 |
4 files changed, 5 insertions, 5 deletions
diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c index d24604c513..16ffaf5240 100644 --- a/src/southbridge/intel/bd82x6x/pch.c +++ b/src/southbridge/intel/bd82x6x/pch.c @@ -327,7 +327,7 @@ static void pch_pcie_enable(struct device *dev) } if (!dev->enabled) { - printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); + printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); /* * PCIE Power Savings for PantherPoint and CougarPoint/B1+ @@ -408,7 +408,7 @@ void pch_enable(struct device *dev) return pch_pcie_enable(dev); if (!dev->enabled) { - printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); + printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); /* Ensure memory, io, and bus master are all disabled */ pci_and_config16(dev, PCI_COMMAND, diff --git a/src/southbridge/intel/i82801gx/i82801gx.c b/src/southbridge/intel/i82801gx/i82801gx.c index 6d4e711552..4783099570 100644 --- a/src/southbridge/intel/i82801gx/i82801gx.c +++ b/src/southbridge/intel/i82801gx/i82801gx.c @@ -56,7 +56,7 @@ void i82801gx_enable(struct device *dev) u16 reg16; if (!dev->enabled) { - printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); + printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); /* Ensure memory, io, and bus master are all disabled */ reg16 = pci_read_config16(dev, PCI_COMMAND); diff --git a/src/southbridge/intel/lynxpoint/pch.c b/src/southbridge/intel/lynxpoint/pch.c index 8f7cdb8cc0..f83f3f675e 100644 --- a/src/southbridge/intel/lynxpoint/pch.c +++ b/src/southbridge/intel/lynxpoint/pch.c @@ -185,7 +185,7 @@ void pch_enable(struct device *dev) return; if (!dev->enabled) { - printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); + printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); /* Ensure memory, io, and bus master are all disabled */ pci_and_config16(dev, PCI_COMMAND, diff --git a/src/southbridge/intel/lynxpoint/pcie.c b/src/southbridge/intel/lynxpoint/pcie.c index 24fab3b41e..2f01560c0c 100644 --- a/src/southbridge/intel/lynxpoint/pcie.c +++ b/src/southbridge/intel/lynxpoint/pcie.c @@ -322,7 +322,7 @@ static void root_port_commit_config(void) if (dev->enabled) continue; - printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); + printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); /* Ensure memory, io, and bus master are all disabled */ pci_and_config16(dev, PCI_COMMAND, |