diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-12 08:16:53 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-17 04:26:15 +0000 |
| commit | 83d6a8a30cafa192dd39aba989e999b60f8e8b95 (patch) | |
| tree | 1cf890368659c28094e6838df83c2d84c26a74b4 /src/southbridge | |
| parent | f44f331e169622f228d08a3051e9215747cce61f (diff) | |
intel/i82801gx,i82801jx: Rename lock_smm()
With PARALLEL_MP the lock has been moved elsewhere.
Change-Id: I2db78fe99aa1d46c5e7bcef99a37619301c98914
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34256
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge')
| -rw-r--r-- | src/southbridge/intel/i82801gx/lpc.c | 9 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801jx/lpc.c | 9 |
2 files changed, 6 insertions, 12 deletions
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 6236ebd800..4e2f9f959e 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -331,8 +331,7 @@ static void enable_clock_gating(void) RCBA32(CG) = reg32; } -#if CONFIG(HAVE_SMI_HANDLER) -static void i82801gx_lock_smm(struct device *dev) +static void i82801gx_set_acpi_mode(struct device *dev) { if (!acpi_is_wakeup_s3()) { #if ENABLE_ACPI_MODE_IN_COREBOOT @@ -349,7 +348,6 @@ static void i82801gx_lock_smm(struct device *dev) outb(APM_CNT_ACPI_ENABLE, APM_CNT); } } -#endif #define SPIBASE 0x3020 static void i82801gx_spi_init(void) @@ -415,9 +413,8 @@ static void lpc_init(struct device *dev) /* Interrupt 9 should be level triggered (SCI) */ i8259_configure_irq_trigger(9, 1); -#if CONFIG(HAVE_SMI_HANDLER) - i82801gx_lock_smm(dev); -#endif + if (CONFIG(HAVE_SMI_HANDLER)) + i82801gx_set_acpi_mode(dev); i82801gx_spi_init(); diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index 5373ba2022..0fcb521430 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -371,8 +371,7 @@ static void enable_clock_gating(void) RCBA32(0x38c0) |= 7; } -#if CONFIG(HAVE_SMI_HANDLER) -static void i82801jx_lock_smm(struct device *dev) +static void i82801jx_set_acpi_mode(struct device *dev) { if (!acpi_is_wakeup_s3()) { #if ENABLE_ACPI_MODE_IN_COREBOOT @@ -389,7 +388,6 @@ static void i82801jx_lock_smm(struct device *dev) outb(APM_CNT_ACPI_ENABLE, APM_CNT); } } -#endif static void lpc_init(struct device *dev) { @@ -431,9 +429,8 @@ static void lpc_init(struct device *dev) /* Interrupt 9 should be level triggered (SCI) */ i8259_configure_irq_trigger(9, 1); -#if CONFIG(HAVE_SMI_HANDLER) - i82801jx_lock_smm(dev); -#endif + if (CONFIG(HAVE_SMI_HANDLER)) + i82801jx_set_acpi_mode(dev); } unsigned long acpi_fill_madt(unsigned long current) |