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authorStefan Reinauer <stepan@openbios.org>2005-12-02 21:52:30 +0000
committerStefan Reinauer <stepan@openbios.org>2005-12-02 21:52:30 +0000
commit7ce8c54e2ba89059d28790550a8f74907b54b916 (patch)
treee89df947fbe9e3f85d6082af6926038e9fe8e61a /src/southbridge
parentc2455dc0ce210b3da2b14be8885803ff47a781eb (diff)
1201_ht_bus0_dev0_fidvid_core.diff
https://openbios.org/roundup/linuxbios/issue41 Lord have mercy upon us. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2118 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/amd8111/amd8111_early_ctrl.c41
1 files changed, 41 insertions, 0 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111_early_ctrl.c b/src/southbridge/amd/amd8111/amd8111_early_ctrl.c
new file mode 100644
index 0000000000..8a648e8d37
--- /dev/null
+++ b/src/southbridge/amd/amd8111/amd8111_early_ctrl.c
@@ -0,0 +1,41 @@
+/* by yhlu 2005.10 */
+static void hard_reset(struct sys_info *sysinfo)
+{
+ device_t dev;
+
+ /* Find the device */
+ dev = PCI_DEV(sysinfo->sbbusn, sysinfo->sbdn+1, 3);
+
+ set_bios_reset();
+
+ /* enable cf9 */
+ pci_write_config8(dev, 0x41, 0xf1);
+ /* reset */
+ outb(0x0e, 0x0cf9);
+}
+
+static void enable_fid_change_on_sb(struct sys_info *sysinfo)
+{
+ device_t dev;
+ /* Find the device */
+ dev = PCI_DEV(sysinfo->sbbusn, sysinfo->sbdn+1, 3);
+
+ pci_write_config8(dev, 0x74, 4);
+
+ /* set VFSMAF ( VID/FID System Management Action Field) to 2 */
+ pci_write_config32(dev, 0x70, 2<<12);
+
+}
+
+static void soft_reset(struct sys_info *sysinfo)
+{
+ device_t dev;
+
+ /* Find the device */
+ dev = PCI_DEV(sysinfo->sbbusn, sysinfo->sbdn+1, 0);
+
+ set_bios_reset();
+ pci_write_config8(dev, 0x47, 1);
+}
+
+