summaryrefslogtreecommitdiff
path: root/src/southbridge
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2020-06-01 20:59:01 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-21 18:23:25 +0000
commit53a343e65b2d452c4a88e6c910a4621c3ced660e (patch)
tree05f3416ce6736053a84d7aeaa0ee8db93ab720d0 /src/southbridge
parentc274be5fc4a608f7de1dfa7c28a0db4412855da1 (diff)
gm45/i82801ix: Use common code for early SMBus
The early SMBus code for this southbridge checked if the PCI device ID is valid. However, we can't easily do that in common code, and we should not attempt to do so either: if a SMBus device behaves differently, then it should not be using the common code anyway. Change-Id: I5c21e091e437d23a173ddcf35d4f1efada6194cb Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42004 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/intel/i82801ix/Kconfig1
-rw-r--r--src/southbridge/intel/i82801ix/Makefile.inc1
-rw-r--r--src/southbridge/intel/i82801ix/early_smbus.c34
3 files changed, 1 insertions, 35 deletions
diff --git a/src/southbridge/intel/i82801ix/Kconfig b/src/southbridge/intel/i82801ix/Kconfig
index bd2cd0f4cb..e1405cfbe0 100644
--- a/src/southbridge/intel/i82801ix/Kconfig
+++ b/src/southbridge/intel/i82801ix/Kconfig
@@ -14,6 +14,7 @@ config SOUTHBRIDGE_INTEL_I82801IX
select SOUTHBRIDGE_INTEL_COMMON_RESET
select SOUTHBRIDGE_INTEL_COMMON_RTC
select SOUTHBRIDGE_INTEL_COMMON_SMBUS
+ select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_SMM
select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9 if !BOARD_EMULATION_QEMU_X86_Q35
select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
diff --git a/src/southbridge/intel/i82801ix/Makefile.inc b/src/southbridge/intel/i82801ix/Makefile.inc
index 91ac65b537..d75ab98bfd 100644
--- a/src/southbridge/intel/i82801ix/Makefile.inc
+++ b/src/southbridge/intel/i82801ix/Makefile.inc
@@ -7,7 +7,6 @@ bootblock-y += early_init.c
romstage-y += dmi_setup.c
romstage-y += early_init.c
-romstage-y += early_smbus.c
ramstage-y += fadt.c
ramstage-y += hdaudio.c
diff --git a/src/southbridge/intel/i82801ix/early_smbus.c b/src/southbridge/intel/i82801ix/early_smbus.c
deleted file mode 100644
index 6731a02fa9..0000000000
--- a/src/southbridge/intel/i82801ix/early_smbus.c
+++ /dev/null
@@ -1,34 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <device/pci_ops.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <device/smbus_host.h>
-#include "i82801ix.h"
-
-uintptr_t smbus_base(void)
-{
- return CONFIG_FIXED_SMBUS_IO_BASE;
-}
-
-int smbus_enable_iobar(uintptr_t base)
-{
- /* Set the SMBus device statically. */
- pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3);
-
- /* Check to make sure we've got the right device. */
- if (pci_read_config16(dev, 0x2) != PCI_DEVICE_ID_INTEL_82801IB_SMB)
- return -1;
-
- /* Set SMBus I/O base. */
- pci_write_config32(dev, SMB_BASE,
- base | PCI_BASE_ADDRESS_SPACE_IO);
-
- /* Set SMBus enable. */
- pci_write_config8(dev, HOSTC, HST_EN);
-
- /* Set SMBus I/O space enable. */
- pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO);
-
- return 0;
-}