aboutsummaryrefslogtreecommitdiff
path: root/src/southbridge
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coresystems.de>2010-04-25 14:37:18 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-25 14:37:18 +0000
commit467a065384f0d50cbf2d100b55b58168ec98f0d3 (patch)
treeca04ca9ad8d9ad716bbd3f787dad0b8d50a36b22 /src/southbridge
parentd55e26f1b1efe50aa013ad32bdf3e2b58101a64f (diff)
no warnings days.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5493 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/amd8111/amd8111_early_smbus.c9
-rw-r--r--src/southbridge/amd/cs5536/cs5536_smbus2.h18
-rw-r--r--src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c9
-rw-r--r--src/southbridge/intel/esb6300/esb6300_smbus.c9
-rw-r--r--src/southbridge/intel/esb6300/esb6300_smbus.h14
-rw-r--r--src/southbridge/intel/i82801cx/i82801cx.h4
-rw-r--r--src/southbridge/intel/i82801cx/i82801cx_reset.c1
-rw-r--r--src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c3
8 files changed, 34 insertions, 33 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111_early_smbus.c b/src/southbridge/amd/amd8111/amd8111_early_smbus.c
index 11aa6f750e..e6d70847ea 100644
--- a/src/southbridge/amd/amd8111/amd8111_early_smbus.c
+++ b/src/southbridge/amd/amd8111/amd8111_early_smbus.c
@@ -26,22 +26,23 @@ static void enable_smbus(void)
print_spew("SMBus controller enabled\n");
}
-static int smbus_recv_byte(unsigned device)
+static inline int smbus_recv_byte(unsigned device)
{
return do_smbus_recv_byte(SMBUS_IO_BASE, device);
}
-static int smbus_send_byte(unsigned device, unsigned char val)
+static inline int smbus_send_byte(unsigned device, unsigned char val)
{
return do_smbus_send_byte(SMBUS_IO_BASE, device, val);
}
-static int smbus_read_byte(unsigned device, unsigned address)
+static inline int smbus_read_byte(unsigned device, unsigned address)
{
return do_smbus_read_byte(SMBUS_IO_BASE, device, address);
}
-static int smbus_write_byte(unsigned device, unsigned address, unsigned char val)
+static inline int smbus_write_byte(unsigned device, unsigned address, unsigned char val)
{
return do_smbus_write_byte(SMBUS_IO_BASE, device, address, val);
}
+
diff --git a/src/southbridge/amd/cs5536/cs5536_smbus2.h b/src/southbridge/amd/cs5536/cs5536_smbus2.h
index 6e50a8cc84..3613b3d37b 100644
--- a/src/southbridge/amd/cs5536/cs5536_smbus2.h
+++ b/src/southbridge/amd/cs5536/cs5536_smbus2.h
@@ -253,18 +253,16 @@ static void _doread(unsigned smbus_io_base, unsigned char device,
printk(BIOS_DEBUG, "SMBUS READ ERROR (%d): %d\n", index, ret);
}
-static unsigned char do_smbus_read_byte(unsigned smbus_io_base,
- unsigned char device,
- unsigned char address)
+static inline unsigned char do_smbus_read_byte(unsigned smbus_io_base,
+ unsigned char device, unsigned char address)
{
unsigned char val = 0;
_doread(smbus_io_base, device, address, &val, sizeof(val));
return val;
}
-static unsigned short do_smbus_read_word(unsigned smbus_io_base,
- unsigned char device,
- unsigned char address)
+static inline unsigned short do_smbus_read_word(unsigned smbus_io_base,
+ unsigned char device, unsigned char address)
{
unsigned short val = 0;
_doread(smbus_io_base, device, address, (unsigned char *)&val,
@@ -304,15 +302,15 @@ static int _dowrite(unsigned smbus_io_base, unsigned char device,
return -1;
}
-static int do_smbus_write_byte(unsigned smbus_io_base, unsigned char device,
- unsigned char address, unsigned char data)
+static inline int do_smbus_write_byte(unsigned smbus_io_base,
+ unsigned char device, unsigned char address, unsigned char data)
{
return _dowrite(smbus_io_base, device, address,
(unsigned char *)&data, 1);
}
-static int do_smbus_write_word(unsigned smbus_io_base, unsigned char device,
- unsigned char address, unsigned short data)
+static inline int do_smbus_write_word(unsigned smbus_io_base,
+ unsigned char device, unsigned char address, unsigned short data)
{
return _dowrite(smbus_io_base, device, address, (unsigned char *)&data,
2);
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c b/src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c
index 64b8d07245..2638e97d5c 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785_early_smbus.c
@@ -25,21 +25,22 @@ static void enable_smbus(void)
outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT);
}
-static int smbus_recv_byte(unsigned device)
+static inline int smbus_recv_byte(unsigned device)
{
return do_smbus_recv_byte(SMBUS_IO_BASE, device);
}
-static int smbus_send_byte(unsigned device, unsigned char val)
+static inline int smbus_send_byte(unsigned device, unsigned char val)
{
return do_smbus_send_byte(SMBUS_IO_BASE, device, val);
}
-static int smbus_read_byte(unsigned device, unsigned address)
+static inline int smbus_read_byte(unsigned device, unsigned address)
{
return do_smbus_read_byte(SMBUS_IO_BASE, device, address);
}
-static int smbus_write_byte(unsigned device, unsigned address, unsigned char val)
+
+static inline int smbus_write_byte(unsigned device, unsigned address, unsigned char val)
{
return do_smbus_write_byte(SMBUS_IO_BASE, device, address, val);
}
diff --git a/src/southbridge/intel/esb6300/esb6300_smbus.c b/src/southbridge/intel/esb6300/esb6300_smbus.c
index 3aa507070d..9be4a4a37e 100644
--- a/src/southbridge/intel/esb6300/esb6300_smbus.c
+++ b/src/southbridge/intel/esb6300/esb6300_smbus.c
@@ -8,13 +8,10 @@
#include "esb6300.h"
#include "esb6300_smbus.h"
-static int lsmbus_read_byte(struct bus *bus, device_t dev, uint8_t address)
+static int lsmbus_read_byte(device_t dev, uint8_t address)
{
- unsigned device;
struct resource *res;
-
- device = dev->path.i2c.device;
- res = find_resource(bus->dev, 0x20);
+ res = find_resource(dev, 0x20);
return do_smbus_read_byte(res->base, device, address);
}
@@ -22,10 +19,12 @@ static int lsmbus_read_byte(struct bus *bus, device_t dev, uint8_t address)
static struct smbus_bus_operations lops_smbus_bus = {
.read_byte = lsmbus_read_byte,
};
+
static struct pci_operations lops_pci = {
/* The subsystem id follows the ide controller */
.set_subsystem = 0,
};
+
static struct device_operations smbus_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
diff --git a/src/southbridge/intel/esb6300/esb6300_smbus.h b/src/southbridge/intel/esb6300/esb6300_smbus.h
index 861230e130..439b8fc586 100644
--- a/src/southbridge/intel/esb6300/esb6300_smbus.h
+++ b/src/southbridge/intel/esb6300/esb6300_smbus.h
@@ -14,18 +14,12 @@
#define SMBUS_TIMEOUT (100*1000*10)
-
-static void smbus_delay(void)
-{
- outb(0x80, 0x80);
-}
-
static int smbus_wait_until_ready(unsigned smbus_io_base)
{
unsigned loops = SMBUS_TIMEOUT;
unsigned char byte;
do {
- smbus_delay();
+ udelay(100);
if (--loops == 0)
break;
byte = inb(smbus_io_base + SMBHSTSTAT);
@@ -38,7 +32,7 @@ static int smbus_wait_until_done(unsigned smbus_io_base)
unsigned loops = SMBUS_TIMEOUT;
unsigned char byte;
do {
- smbus_delay();
+ udelay(100);
if (--loops == 0)
break;
byte = inb(smbus_io_base + SMBHSTSTAT);
@@ -46,18 +40,20 @@ static int smbus_wait_until_done(unsigned smbus_io_base)
return loops?0:-1;
}
+#ifdef UNUSED_CODE
static int smbus_wait_until_blk_done(unsigned smbus_io_base)
{
unsigned loops = SMBUS_TIMEOUT;
unsigned char byte;
do {
- smbus_delay();
+ udelay(100);
if (--loops == 0)
break;
byte = inb(smbus_io_base + SMBHSTSTAT);
} while((byte&(1<<7)) == 0);
return loops?0:-1;
}
+#endif
static int do_smbus_read_byte(unsigned smbus_io_base, unsigned device, unsigned address)
{
diff --git a/src/southbridge/intel/i82801cx/i82801cx.h b/src/southbridge/intel/i82801cx/i82801cx.h
index 4cb215efbb..ea7d858d14 100644
--- a/src/southbridge/intel/i82801cx/i82801cx.h
+++ b/src/southbridge/intel/i82801cx/i82801cx.h
@@ -2,8 +2,10 @@
#define I82801CX_H
#if !defined(__PRE_RAM__)
+#include <device/device.h>
#include "chip.h"
-extern void i82801cx_enable(device_t dev);
+void i82801cx_enable(device_t dev);
+void i82801cx_hard_reset(void);
#endif
diff --git a/src/southbridge/intel/i82801cx/i82801cx_reset.c b/src/southbridge/intel/i82801cx/i82801cx_reset.c
index 20e8530c54..bd479de758 100644
--- a/src/southbridge/intel/i82801cx/i82801cx_reset.c
+++ b/src/southbridge/intel/i82801cx/i82801cx_reset.c
@@ -1,4 +1,5 @@
#include <arch/io.h>
+#include "i82801cx.h"
void i82801cx_hard_reset(void)
{
diff --git a/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c b/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c
index 60337d1635..3a178b8e74 100644
--- a/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c
+++ b/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c
@@ -134,6 +134,9 @@ static void mcp55_early_clear_port(unsigned mcp55_num, unsigned *busn, unsigned
}
+#include "src/pc80/udelay_io.c"
+#include "src/lib/delay.c"
+
static void mcp55_early_pcie_setup(unsigned busnx, unsigned devnx, unsigned anactrl_io_base, unsigned pci_e_x)
{
uint32_t tgio_ctrl;