remove more warnings.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5353 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

6 files changed, 17 insertions, 14 deletions

diff --git a/src/southbridge/via/vt8237r/vt8237_ctrl.c b/src/southbridge/via/vt8237r/vt8237_ctrl.c
index 45af37624e..08c9c54754 100644
--- a/src/southbridge/via/vt8237r/vt8237_ctrl.c
+++ b/src/southbridge/via/vt8237r/vt8237_ctrl.c
@@ -22,12 +22,13 @@
 #include <device/pci_ops.h>
 #include <device/pci_ids.h>
 #include <console/console.h>
+#include "vt8237r.h"
 
 /* We support here K8M890/K8T890 and VT8237/S/A PCI1/Vlink */
 
 static void vt8237_cfg(struct device *dev)
 {
-	u8 regm, regm2, regm3;
+	u8 regm, regm3;
 	device_t devfun3;
 
 	devfun3 = dev_find_device(PCI_VENDOR_ID_VIA,
@@ -69,6 +70,7 @@ static void vt8237_cfg(struct device *dev)
 	regm = pci_read_config8(devfun3, 0x83);
 	pci_write_config8(dev, 0x63, regm);
 
+	// FIXME is this really supposed to be regm3?
 	regm3 = pci_read_config8(devfun3, 0x82);/* Shadow page E */
 	pci_write_config8(dev, 0x64, regm);
 
@@ -167,8 +169,6 @@ static void ctrl_enable(struct device *dev)
 	pci_write_config8(dev, 0x4f, 0x43);
 }
 
-extern void dump_south(device_t dev);
-
 static void ctrl_init(struct device *dev)
 {
 	/*
diff --git a/src/southbridge/via/vt8237r/vt8237r.c b/src/southbridge/via/vt8237r/vt8237r.c
index 2b5d34bccc..be24bb5dc2 100644
--- a/src/southbridge/via/vt8237r/vt8237r.c
+++ b/src/southbridge/via/vt8237r/vt8237r.c
@@ -21,6 +21,7 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
+#include "vt8237r.h"
 #include "chip.h"
 
 /*
@@ -28,11 +29,6 @@
  *		VT8237R_SouthBridge_Revision2.06_Lead-Free.zip
  */
 
-void hard_reset(void)
-{
-	printk(BIOS_ERR, "NO HARD RESET ON VT8237R! FIX ME!\n");
-}
-
 #if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 7
 void writeback(struct device *dev, u16 where, u8 what)
 {
diff --git a/src/southbridge/via/vt8237r/vt8237r.h b/src/southbridge/via/vt8237r/vt8237r.h
index 780876ce38..4e2484511e 100644
--- a/src/southbridge/via/vt8237r/vt8237r.h
+++ b/src/southbridge/via/vt8237r/vt8237r.h
@@ -103,4 +103,9 @@ __attribute__ ((packed))
 #endif
 ;
 
+#ifndef __PRE_RAM__
+void writeback(struct device *dev, u16 where, u8 what);
+void dump_south(device_t dev);
+#endif
+
 #endif
diff --git a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
index 533cbe0c88..4dd3678097 100644
--- a/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
+++ b/src/southbridge/via/vt8237r/vt8237r_early_smbus.c
@@ -61,8 +61,9 @@ static void smbus_wait_until_ready(void)
 
 	PRINT_DEBUG("Waiting until SMBus ready\n");
 
-	loops = 0;
 	/* Yes, this is a mess, but it's the easiest way to do it. */
+	/* XXX not so messy, but an explanation of the hack would have been better */
+	loops = 0;
 	while ((inb(SMBHSTSTAT) & 1) == 1 && loops < SMBUS_TIMEOUT)
 		++loops;
 
@@ -464,6 +465,8 @@ int vt8237_early_network_init(struct vt8237_network_rom *rom)
 	pci_write_config32(dev, 0x5c, tmp | 0x01000000); /* Toggle SEEPR. */
 
 	/* Yes, this is a mess, but it's the easiest way to do it. */
+	/* XXX not so messy, but an explanation of the hack would have been better */
+	loops = 0;
 	while ((((pci_read_config32(dev, 0x5c) >> 25) & 1) == 0)
 	       && (loops < LAN_TIMEOUT)) {
 		++loops;
diff --git a/src/southbridge/via/vt8237r/vt8237r_ide.c b/src/southbridge/via/vt8237r/vt8237r_ide.c
index 0b4dccc2f0..ecbcfffc8c 100644
--- a/src/southbridge/via/vt8237r/vt8237r_ide.c
+++ b/src/southbridge/via/vt8237r/vt8237r_ide.c
@@ -35,10 +35,8 @@ static void ide_init(struct device *dev)
 	struct southbridge_via_vt8237r_config *sb =
 	    (struct southbridge_via_vt8237r_config *)dev->chip_info;
 
-	u8 enables, reg8;
+	u8 enables;
 	u32 cablesel;
-	device_t lpc_dev;
-	int i, j;
 
 	printk(BIOS_INFO, "%s IDE interface %s\n", "Primary",
 		    sb->ide0_enable ? "enabled" : "disabled");
@@ -98,6 +96,8 @@ static void ide_init(struct device *dev)
 	pci_write_config32(dev, IDE_UDMA, cablesel);
 
 #if CONFIG_EPIA_VT8237R_INIT
+	device_t lpc_dev;
+
 	/* Set PATA Output Drive Strength */
 	lpc_dev = dev_find_device(PCI_VENDOR_ID_VIA,
 				    PCI_DEVICE_ID_VIA_VT8237R_LPC, 0);
diff --git a/src/southbridge/via/vt8237r/vt8237r_lpc.c b/src/southbridge/via/vt8237r/vt8237r_lpc.c
index 4e09823a69..f47c8c8dff 100644
--- a/src/southbridge/via/vt8237r/vt8237r_lpc.c
+++ b/src/southbridge/via/vt8237r/vt8237r_lpc.c
@@ -34,7 +34,6 @@
 #include "vt8237r.h"
 #include "chip.h"
 
-extern void dump_south(device_t dev);
 static void southbridge_init_common(struct device *dev);
 
 #if CONFIG_EPIA_VT8237R_INIT
@@ -248,7 +247,7 @@ static void setup_pm(device_t dev)
 
 static void vt8237r_init(struct device *dev)
 {
-	u8 enables, reg8;
+	u8 enables;
 	
 #if CONFIG_EPIA_VT8237R_INIT
 	printk(BIOS_SPEW, "Entering vt8237r_init, for EPIA.\n");