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authorMartin Roth <martin.roth@se-eng.com>2014-12-09 13:49:05 -0700
committerMartin Roth <gaumless@gmail.com>2014-12-17 16:54:21 +0100
commit84422b1a20be7897e3b054ebbfc26f82b0fcdc76 (patch)
tree320d2d8fe7925d0ad01eac93801cc58204a79489 /src/southbridge/via/vt8237r/lpc.c
parentb348bb5cfb269ceedfea5dff3dd088cdcf31485a (diff)
southbridge/via: Spelling fixes
Change-Id: I7efc441d3da10e48c8c79e4cd51885bb14eebd55 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7730 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/southbridge/via/vt8237r/lpc.c')
-rw-r--r--src/southbridge/via/vt8237r/lpc.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c
index 9e8f6f62e5..92eaa39ac6 100644
--- a/src/southbridge/via/vt8237r/lpc.c
+++ b/src/southbridge/via/vt8237r/lpc.c
@@ -165,10 +165,10 @@ static void setup_pm(device_t dev)
pci_write_config8(dev, 0x82, 0x40 | VT8237R_ACPI_IRQ);
#if CONFIG_EPIA_VT8237R_INIT
- /* Primary interupt channel, define wake events 0=IRQ0 15=IRQ15 1=en. */
+ /* Primary interrupt channel, define wake events 0=IRQ0 15=IRQ15 1=en. */
pci_write_config16(dev, 0x84, 0x3052);
#else
- /* Primary interupt channel, define wake events 0=IRQ0 15=IRQ15 1=en. */
+ /* Primary interrupt channel, define wake events 0=IRQ0 15=IRQ15 1=en. */
pci_write_config16(dev, 0x84, 0x30b2);
#endif
@@ -358,7 +358,7 @@ static void vt8237a_init(struct device *dev)
{
/*
* FIXME: This is based on vt8237s_init() and the values the AMI
- * BIOS on my M2V wrote to these registers (by loking
+ * BIOS on my M2V wrote to these registers (by looking
* at lspci -nxxx output).
* Works for me.
*/