diff options
| author | Martin Roth <martin.roth@se-eng.com> | 2014-12-09 13:49:05 -0700 |
|---|---|---|
| committer | Martin Roth <gaumless@gmail.com> | 2014-12-17 16:54:21 +0100 |
| commit | 84422b1a20be7897e3b054ebbfc26f82b0fcdc76 (patch) | |
| tree | 320d2d8fe7925d0ad01eac93801cc58204a79489 /src/southbridge/via/vt8235/ide.c | |
| parent | b348bb5cfb269ceedfea5dff3dd088cdcf31485a (diff) | |
southbridge/via: Spelling fixes
Change-Id: I7efc441d3da10e48c8c79e4cd51885bb14eebd55
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7730
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/southbridge/via/vt8235/ide.c')
| -rw-r--r-- | src/southbridge/via/vt8235/ide.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/via/vt8235/ide.c b/src/southbridge/via/vt8235/ide.c index 961f860fed..176e70fea7 100644 --- a/src/southbridge/via/vt8235/ide.c +++ b/src/southbridge/via/vt8235/ide.c @@ -14,7 +14,7 @@ static void ide_init(struct device *dev) /*if (!conf->enable_native_ide) { */ /* - * Run the IDE controller in 'compatiblity mode - i.e. don't + * Run the IDE controller in 'compatibility mode - i.e. don't * use PCI interrupts. Using PCI ints confuses linux for some * reason. */ @@ -22,7 +22,7 @@ static void ide_init(struct device *dev) __func__); enables = pci_read_config8(dev, 0x42); printk(BIOS_DEBUG, "enables in reg 0x42 0x%x\n", enables); - enables &= ~0xc0; // compatability mode + enables &= ~0xc0; // compatibility mode pci_write_config8(dev, 0x42, enables); enables = pci_read_config8(dev, 0x42); printk(BIOS_DEBUG, "enables in reg 0x42 read back as 0x%x\n", @@ -85,7 +85,7 @@ static void ide_init(struct device *dev) printk(BIOS_DEBUG, "command in reg 0x4 reads back as 0x%x\n", enables); if (!conf->enable_native_ide) { - // Use compatability mode - per award bios + // Use compatibility mode - per award bios pci_write_config32(dev, 0x10, 0x0); pci_write_config32(dev, 0x14, 0x0); pci_write_config32(dev, 0x18, 0x0); |