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authorArthur Heymans <arthur@aheymans.xyz>2023-06-27 16:44:59 +0200
committerLean Sheng Tan <sheng.tan@9elements.com>2023-09-18 13:34:47 +0000
commit3df6cc9de61ba16a94b40086999ddb6a9943dc26 (patch)
treeadf8645c5b6fc22002b85b7f99858bd9cc4d8d0f /src/southbridge/ti
parentfca612497db15caebdf97d741c85193ee2f0044b (diff)
acpi: Add functions to declare ARM GIC V3 hardware
For GICD and GICR a SOC needs to implement 2 callbacks to get the base of those interrupt controllers. For all the cpu GIC the code loops over all the DEVICE_PATH_GICC_V3 devices in a similar fashion to how x86 lapics are added. It's up to the SOC to add those devices to the tree. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: I5074d0a76316e854b7801e14b3241f88e805b02f Reviewed-on: https://review.coreboot.org/c/coreboot/+/76132 Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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