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author | Richard Spiegel <richard.spiegel@amd.corp-partner.google.com> | 2018-09-03 08:55:51 -0700 |
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committer | Martin Roth <martinroth@google.com> | 2018-09-07 14:53:54 +0000 |
commit | 7160766ebf97aa33b2cd708146ba84701b5a6fff (patch) | |
tree | 91284b0de15fa2d5bd2eb6502f30c9a05eae2a63 /src/southbridge/ti/pci1x2x/Makefile.inc | |
parent | 653f760b133fcad4b6465a25867f0c6d9b24bdb0 (diff) |
lib/gpio.c: Fix _gpio_base3_value invalid shift
Coverity CID 1395334: (BAD_SHIFT) - In function _gpio_base3_value(), if
gpio_num is 32 and gpio[31] is floating, the end result is 1 << 32, which
does not fit into a int. To avoid a possible error, make it an error to have
num_gpio > 31. Function _gpio_base2_value also have the same issue, but the
limit would be 32. As in practice it'll never be used with more than 20 GPIO,
create a helper function to limit it to 31 and call it everywhere needed.
BUG=b:113788440
TEST=Add a fake code to southbridge_final calling the function and printing
the result. Build and boot grunt, check result.
Change-Id: I0b79725bcbaf120587c7440e176643aaa7a1d5bb
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/28445
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/ti/pci1x2x/Makefile.inc')
0 files changed, 0 insertions, 0 deletions