diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-08-31 19:22:16 +0200 |
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committer | Martin Roth <martinroth@google.com> | 2016-08-31 20:22:46 +0200 |
commit | ba28e8d73b143def8dfe7c0dc7cfcbce83c601a1 (patch) | |
tree | 9f7e4416b63e26ee3f4df6f9a61ab55f377bcb5f /src/southbridge/sis/sis966/sata.c | |
parent | 2e4d80687dd79890c7c9edad8dbaf6e89edf2afc (diff) |
src/southbridge: Code formating
Change-Id: Icfc35b73bacb60b1f21e71e70ad4418ec3e644f6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16291
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/sis/sis966/sata.c')
-rw-r--r-- | src/southbridge/sis/sis966/sata.c | 53 |
1 files changed, 25 insertions, 28 deletions
diff --git a/src/southbridge/sis/sis966/sata.c b/src/southbridge/sis/sis966/sata.c index eb69ab074a..3f114a0148 100644 --- a/src/southbridge/sis/sis966/sata.c +++ b/src/southbridge/sis/sis966/sata.c @@ -109,22 +109,19 @@ static void sata_init(struct device *dev) { struct southbridge_sis_sis966_config *conf; - - conf = dev->chip_info; - printk(BIOS_DEBUG, "SATA_INIT:---------->\n"); + printk(BIOS_DEBUG, "SATA_INIT:---------->\n"); //-------------- enable IDE (SiS1183) ------------------------- { - uint8_t temp8; - int i=0; - while(SiS_SiS1183_init[i][0] != 0) - { - temp8 = pci_read_config8(dev, SiS_SiS1183_init[i][0]); - temp8 &= SiS_SiS1183_init[i][1]; - temp8 |= SiS_SiS1183_init[i][2]; - pci_write_config8(dev, SiS_SiS1183_init[i][0], temp8); - i++; + uint8_t temp8; + int i=0; + while (SiS_SiS1183_init[i][0] != 0) { + temp8 = pci_read_config8(dev, SiS_SiS1183_init[i][0]); + temp8 &= SiS_SiS1183_init[i][1]; + temp8 |= SiS_SiS1183_init[i][2]; + pci_write_config8(dev, SiS_SiS1183_init[i][0], temp8); + i++; }; } //----------------------------------------------------------- @@ -133,33 +130,33 @@ static void sata_init(struct device *dev) uint32_t i,j; uint32_t temp32; -for (i=0;i<10;i++){ - temp32=0; - temp32= pci_read_config32(dev, 0xC0); - for ( j=0;j<0xFFFF;j++); - printk(BIOS_DEBUG, "status= %x\n",temp32); - if (((temp32&0xF) == 0x3) || ((temp32&0xF) == 0x0)) break; +for (i=0;i<10;i++) { + temp32=0; + temp32= pci_read_config32(dev, 0xC0); + for ( j=0;j<0xFFFF;j++); + printk(BIOS_DEBUG, "status= %x\n",temp32); + if (((temp32&0xF) == 0x3) || ((temp32&0xF) == 0x0)) break; } } #if DEBUG_SATA { - int i; + int i; - printk(BIOS_DEBUG, "****** SATA PCI config ******"); - printk(BIOS_DEBUG, "\n 03020100 07060504 0B0A0908 0F0E0D0C"); + printk(BIOS_DEBUG, "****** SATA PCI config ******"); + printk(BIOS_DEBUG, "\n 03020100 07060504 0B0A0908 0F0E0D0C"); - for (i=0;i<0xff;i+=4){ - if ((i%16)==0) - printk(BIOS_DEBUG, "\n%02x: ", i); - printk(BIOS_DEBUG, "%08x ", pci_read_config32(dev,i)); - } - printk(BIOS_DEBUG, "\n"); + for (i=0;i<0xff;i+=4) { + if ((i%16)==0) + printk(BIOS_DEBUG, "\n%02x: ", i); + printk(BIOS_DEBUG, "%08x ", pci_read_config32(dev,i)); + } + printk(BIOS_DEBUG, "\n"); } #endif - printk(BIOS_DEBUG, "SATA_INIT:<----------\n"); + printk(BIOS_DEBUG, "SATA_INIT:<----------\n"); } |