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| author | Scott Chao <scott_chao@wistron.corp-partner.google.com> | 2022-04-19 19:09:35 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-27 12:27:52 +0000 |
| commit | 0ed3dfc92aac24eeca26081c4ac49c3df9d5907b (patch) | |
| tree | 66eb02a9717478ca65ac239453f532b6c4c507c3 /src/southbridge/ricoh | |
| parent | c48070798689cc4d4e5c8fd64d43359423023b81 (diff) | |
mb/google/brya/var/crota: update gpio configuration
- enable CPU PCIe VGPIO for PEG60
- enable GPP_C3/ GPP_C4 native function
- set unused GPIO to NC
BUG=b:229584785
BRANCH=none
TEST=build and boot into kernel v5.10
Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Change-Id: I5d4ef92623ce6b0a36e6df23b232b35b498ce964
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63713
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/southbridge/ricoh')
0 files changed, 0 insertions, 0 deletions