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authorLee Leahy <leroy.p.leahy@intel.com>2016-07-25 10:14:07 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2016-08-05 01:53:49 +0200
commitf26fc0f28bf62dd34533aea47105f174ee794e66 (patch)
tree5bcb26ddc174f46ff7acbd5ab6689320c74f9a99 /src/southbridge/ricoh/rl5c476
parent102f6253600cfa3f741c0d1d126436d612daa203 (diff)
soc/intel/quark: Add FSP 2.0 romstage support
Add the pieces necessary to successfully build and run romstage using the FSP 2.0 build. Because romstage is using postcar, add the postcar pieces so that romstage can attempt to load postcar. TEST=Build and run on Galileo Gen2 Change-Id: I66b3437e3c7840223535f6ab643599c9e4924968 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15866 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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