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authorElyes HAOUAS <ehaouas@noos.fr>2020-08-19 21:40:21 +0200
committerMichael Niewöhner <foss@mniewoehner.de>2020-09-21 16:29:35 +0000
commit131d9f5190a1e5b6fd5a47fecbe5f7eef002c0ef (patch)
treeaccfc86126dba3bf22fe731689ee791894a3bcaa /src/southbridge/ricoh/rl5c476
parentb69bbfe1ef52421f0bbe1e632d99dc264660ee02 (diff)
src/southbridge: Drop unneeded empty lines
Change-Id: I02aa1e2a9a9061b34b91f832d96123a8595d61b7 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44592 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/southbridge/ricoh/rl5c476')
-rw-r--r--src/southbridge/ricoh/rl5c476/rl5c476.c3
-rw-r--r--src/southbridge/ricoh/rl5c476/rl5c476.h2
2 files changed, 0 insertions, 5 deletions
diff --git a/src/southbridge/ricoh/rl5c476/rl5c476.c b/src/southbridge/ricoh/rl5c476/rl5c476.c
index 73cb2e1fda..e0744b314e 100644
--- a/src/southbridge/ricoh/rl5c476/rl5c476.c
+++ b/src/southbridge/ricoh/rl5c476/rl5c476.c
@@ -107,11 +107,9 @@ static void rl5c476_init(struct device *dev)
pc16->moffl0 = 0;
pc16->moffh0 = 0x40;
-
/* set I/O width for Auto Data width */
pc16->ioctrl = 0x22;
-
/* enable I/O window 0 and 1 */
pc16->awinen = 0xc1;
@@ -125,7 +123,6 @@ static void rl5c476_init(struct device *dev)
pc16->igctrl = 0x69;
-
/* 16 bit CF always have first config byte at 0x200 into
* Config structure, but CF+ may not according to spec -
* should locate through reading tuple data, but this should
diff --git a/src/southbridge/ricoh/rl5c476/rl5c476.h b/src/southbridge/ricoh/rl5c476/rl5c476.h
index 4f5ecdc8bf..e27e7a383f 100644
--- a/src/southbridge/ricoh/rl5c476/rl5c476.h
+++ b/src/southbridge/ricoh/rl5c476/rl5c476.h
@@ -2,10 +2,8 @@
/* rl5c476 routines and defines*/
-
#include <stdint.h>
-
/* the 16 bit control structure for ricoh cardbus bridge */
typedef struct pc16reg {
u8 idrevs;