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| author | Duncan Laurie <dlaurie@chromium.org> | 2013-01-11 09:54:55 -0800 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-03-17 22:52:32 +0100 |
| commit | 218a6864ff9528ecdb381d91991c9045bbb6843f (patch) | |
| tree | 1f7f1d81486d36e804c5f416e2b42d71c59eb0f3 /src/southbridge/rdc | |
| parent | c9fc0297ad6a63d9edf981a46f29f9372d11634c (diff) | |
Add Intel Whitetip Mountain 1 mainboard
Lots of things are still placeholder and need work.
Due to the useful GPIOs being run to either the EC or the SIO1007
I have hard coded developer mode on and recovery mode off.
Change-Id: I4c308bd90db03ac5bffdfde566e5adbbaabac632
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/2724
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/rdc')
0 files changed, 0 insertions, 0 deletions